Signal Integrity and High Speed Digital High Speed PCB Design Informational

What is the eye diagram and how do I interpret it for a high speed serial link?

What is the eye diagram and how do I interpret it for a high speed serial link? The eye diagram is the fundamental visualization tool for assessing the signal quality of a digital link, created by overlapping all possible bit transitions on a single display: (1) How it is created: the oscilloscope triggers on the data clock (or recovers the clock from the data). Each bit period is overlaid on the same display. The result is an "eye"-shaped pattern where all possible transitions (0→1, 1→0, 0→0, 1→1) are superimposed. For NRZ (2-level) signaling: one eye opening. For PAM4 (4-level) signaling: three eye openings stacked vertically. (2) Key parameters: eye height: the vertical opening of the eye at the sampling point. Represents the voltage margin available for the receiver to distinguish between 0 and 1. Larger eye height = more noise margin. Eye width: the horizontal opening of the eye. Represents the timing margin available for the receiver to sample the data correctly. Larger eye width = more jitter margin. Eye mask: a specification-defined region inside the eye that must be clear of any signal traces. If any trace enters the mask: the signal fails the specification. Common masks: IEEE 802.3 (Ethernet), USB4, PCIe Gen5/6. Jitter: the horizontal spread of the transitions at the crossing point. Total jitter = deterministic jitter (DJ) + random jitter (RJ). DJ: caused by ISI (inter-symbol interference), duty cycle distortion, and periodic jitter. RJ: caused by thermal noise, phase noise, and random processes. Rise/fall time: the time for the signal to transition between 20% and 80% of the amplitude. Faster transitions = wider eye opening (steeper zero crossings). (3) What degrades the eye: channel loss (insertion loss): attenuates high-frequency components, slowing edge rates and reducing eye height. This is the dominant impairment for long channels (> 10 cm at 25 Gbps). Impedance mismatches (reflections): create ghost transitions that close the eye horizontally and vertically. Crosstalk: noise from adjacent signals adds random and deterministic noise, reducing eye height. Jitter: random and deterministic timing variations reduce eye width.

Category: Signal Integrity and High Speed Digital

Updated: April 2026

Product Tie-In: PCB Materials, Connectors, Test Equipment

Eye Diagram Interpretation

The eye diagram provides a single visual summary of all time-domain impairments affecting a digital link, making it the most intuitive signal quality metric for high-speed designers.

NRZ vs PAM4 Eye

(1) NRZ (Non-Return-to-Zero): 2 voltage levels (0, 1), one eye opening. Each bit carries 1 bit of information. Eye height (typical at 25 Gbps): 100-300 mV after channel loss. Used in: PCIe Gen1-5, USB 3.0-3.2, 10/25G Ethernet. (2) PAM4 (Pulse Amplitude Modulation, 4 levels): 4 voltage levels (0, 1, 2, 3), three eye openings. Each symbol carries 2 bits of information (double the bit rate for the same baud rate). Eye height: approximately 1/3 of the NRZ eye for the same voltage swing. This makes PAM4 much more sensitive to noise and requires: better channel loss, more powerful equalization, and forward error correction (FEC). Used in: PCIe Gen6, 400G/800G Ethernet, DDR5 (optional). (3) Equalization (see Q989) opens the eye by compensating for channel loss and reflections. Modern SerDes use 3-stage equalization: TX FFE + RX CTLE + RX DFE.

Eye Diagram Parameters

Eye height: voltage margin (mV)
Eye width: timing margin (ps or UI)
Jitter = DJ + RJ (deterministic + random)
BER from eye: BER = erfc(Q/√2)/2, Q = eye_height/(2σ)
PAM4: 3 eye openings, ~1/3 NRZ eye height

Common Questions

Frequently Asked Questions

What is an eye mask test?

An eye mask is a polygon (hexagonal or diamond shape) placed inside the eye opening. If any measured waveform trace enters the mask region: the test FAILS. The mask dimensions are defined by the protocol specification. Example: IEEE 802.3 KR (10GBase-KR) defines a mask with specific height and width requirements relative to the unit interval (UI) and voltage amplitude. Mask compliance is a pass/fail test for transmitter quality and is required for interoperability certification.

How many bits do I need to capture for a good eye?

Minimum: 10,000 bit transitions for a basic eye shape. Good: 100,000-1,000,000 bits for clear jitter statistics. For BER estimation: 10⁶ - 10⁹ bits are needed to observe rare events (jitter tails). Real-time oscilloscopes can capture millions of UIs in a single acquisition. Equivalent-time oscilloscopes build the eye over many trigger events (each acquisition adds a few points).

Can I extract BER from the eye diagram?

Yes. The Q-factor relates the eye opening to the BER: Q = (eye height) / (2 × σ_noise). BER = 0.5 × erfc(Q/√2). Example: eye height = 200 mV, σ_noise = 15 mV → Q = 200/(2×15) = 6.67 → BER ≈ 1.3×10⁻¹¹. For PAM4: the BER is calculated for each of the three eyes separately, and the worst eye determines the link BER.

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