Signal Integrity and High Speed Digital High Speed PCB Design Informational

How do I calculate the impedance of a differential pair on a PCB at multi-GHz data rates?

How do I calculate the impedance of a differential pair on a PCB at multi-GHz data rates? The differential impedance is determined by the trace geometry, dielectric properties, and coupling between the two traces, and must be precisely controlled for high-speed signal integrity: (1) Differential impedance definition: Z_diff = 2 × Z_single × (1 - k), where Z_single is the single-ended characteristic impedance and k is the coupling coefficient between the two traces (0 = no coupling, 1 = perfect coupling). Typical targets: 100 ohm differential (50 ohm single-ended per trace) for most standards (USB, PCIe, Ethernet). 85 ohm differential for some legacy protocols. 90 ohm differential for HDMI. (2) Key geometry parameters: stripline: traces sandwiched between two ground planes. More consistent impedance (shielded by ground planes on both sides). Typical for inner-layer differential pairs. Microstrip: traces on the outer layer with one ground plane below. Higher impedance for the same geometry (vs stripline, due to partial air dielectric). Z_diff depends on: trace width (W), trace spacing (S), dielectric height (H), and dielectric constant (Dk). For 100 ohm differential stripline: W ≈ 4 mil, S ≈ 5 mil, H ≈ 4 mil (each side), Dk = 3.5 (FR-4). These values scale with the substrate: low-loss materials (Dk 3.0-3.2) require wider traces for the same impedance. (3) Frequency dependence at multi-GHz: at DC-1 GHz: the impedance is well-predicted by 2D cross-section models (assuming TEM mode). At 10+ GHz: the dielectric constant (Dk) and loss tangent (Df) become frequency-dependent. Dk decreases by 3-8% from 1 GHz to 25 GHz for standard FR-4. This Dk variation changes the impedance by 2-4% over frequency. Roughness: copper surface roughness causes the effective conductor length to increase at high frequencies, adding impedance and loss. Standard FR-4: copper roughness (Rz) = 3-6 μm. Low-loss laminates: smooth copper (Rz < 1 μm) → better impedance consistency at > 10 GHz. (4) Calculation tools: 2D field solvers: Polar Instruments Si9000, Altium Impedance Calculator, HyperLynx. These solve the electromagnetic cross-section and compute Z_diff, Z_single, and propagation delay. 3D field solvers (for discontinuities): ANSYS HFSS, Dassault CST, Cadence Clarity. Manufacturer specifications: PCB fabricators (e.g., TTM, AT&S) provide impedance calculators based on their specific materials and processes.
Category: Signal Integrity and High Speed Digital
Updated: April 2026
Product Tie-In: PCB Materials, Connectors, Test Equipment

Differential Pair Impedance

Precise impedance control is the foundation of high-speed PCB design, and even small impedance variations cause reflections that degrade signal integrity.

Common Questions

Frequently Asked Questions

Why 100 ohm differential?

100 ohm was selected as the standard because: it provides a good balance between trace width and spacing (neither too narrow nor too wide). It matches the characteristic impedance of most high-speed I/O driver circuits. 50 ohm single-ended × 2 = 100 ohm (simplifies impedance matching). Nearly all modern SerDes standards (PCIe 5.0/6.0, USB4, 400G Ethernet, DDR5) specify 100 ohm differential impedance.

How does spacing affect differential impedance?

Tighter spacing (smaller S): increases coupling (higher k), reduces Z_diff. Example: S = 5 mil → Z_diff = 100 ohm. S = 15 mil → Z_diff ≈ 96 ohm. This is counter-intuitive: wider spacing makes the two traces behave more like independent 50 ohm lines (Z_diff → 100 ohm), while tight spacing couples them (Z_diff < 100 ohm). For heavily coupled pairs: the common-mode impedance also changes, affecting common-mode noise rejection.

Do I need a 2D field solver?

For data rates below 5 Gbps: approximate formulas (Johnson, Wadell, or IPC-2141 equations) are adequate. Above 5 Gbps: a 2D field solver is recommended (accounts for conductor shape, etch factor, solder mask effect). Above 25 Gbps: a 3D field solver may be needed for discontinuities (via transitions, BGA breakout) that the 2D solver cannot model.

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