What is return loss and how does it affect the bit error rate of a high speed serial link?
Return Loss and BER
Return loss management is one of the primary design tasks for high-speed channels, and every impedance discontinuity must be analyzed and optimized.
Frequently Asked Questions
What is the minimum acceptable return loss?
Rule of thumb: S11 < -10 dB at all frequencies up to the Nyquist frequency. This ensures > 90% of the signal power passes through each discontinuity. For PAM4 at 56+ Gbps: tighter requirements (S11 < -12 to -15 dB) due to the smaller eye opening.
How do I improve the return loss of a connector?
Select a connector with a specified S11 better than your requirement. The connector vendor provides S-parameter models (Touchstone files) for simulation. Add a matching pad or anti-pad optimization at the connector footprint. Use staggered pin assignment (signal pins adjacent to ground pins) for better impedance control. The connector is often the most difficult component to improve (it is a purchased part with fixed geometry).
Can equalization compensate for poor return loss?
Partially. The RX CTLE and DFE can partially compensate for reflections by treating them as additional ISI taps. However: reflections that arrive with long delays (from far-away discontinuities) are harder to equalize (the DFE has a finite number of taps). Equalization does NOT remove the reflected energy; it re-shapes the receiver decision to account for it. Prevention (good impedance design) is always better than compensation (equalization).