What is the difference between an integer-N and a fractional-N frequency synthesizer?
Synthesizer Architecture Comparison
The integer-N PLL has a fundamental limitation: the comparison frequency determines both the frequency resolution and the maximum loop bandwidth. For 1 kHz frequency steps at a 2 GHz output: N = 2,000,000. The noise multiplication is 20·log10(2,000,000) = 126 dB, making the in-band noise very poor. The loop bandwidth cannot exceed about 100 Hz (fcomp/10), which severely limits the ability to suppress the VCO's close-in phase noise.
| Parameter | Passive Diode | Active FET | Subharmonic |
|---|---|---|---|
| Conversion Loss/Gain | 5-9 dB loss | 0-10 dB gain | 8-12 dB loss |
| LO Drive Level | +7 to +17 dBm | -5 to +5 dBm | +5 to +13 dBm |
| IP3 (typical) | +15 to +30 dBm | +5 to +20 dBm | +10 to +20 dBm |
| Noise Figure | 5-9 dB (= conv. loss) | 8-15 dB | 9-14 dB |
| LO-RF Isolation | 25-45 dB | 15-35 dB | 20-40 dB |
- Performance verification: confirm specifications against the application requirements before finalizing the design
- Environmental factors: temperature range, humidity, and vibration affect long-term reliability and parameter drift
- Cost vs. performance: evaluate whether the application demands premium components or standard commercial grades
- Interface compatibility: verify impedance, connector type, and mechanical form factor match the system architecture
Frequently Asked Questions
When should I use integer-N?
When the required frequency step is large enough to allow a high comparison frequency. For example: 1 MHz steps at 1-2 GHz (N = 1000-2000). Also for ultra-low-spur applications where the quantization noise of fractional-N is unacceptable (radio astronomy, precision test equipment).
What are fractional spurs?
Fractional spurs are discrete spectral lines that appear near the carrier due to periodic patterns in the divider modulation. They are worst at fractions with small denominators (N+1/4, N+1/3) and minimum at large denominators. Modern PLL chips include spur-reduction techniques (random dithering, spur-avoidance algorithms) that reduce fractional spurs to -60 to -80 dBc.
What about direct digital synthesis (DDS)?
DDS generates frequencies by directly computing waveform samples from a digital accumulator and converting them to analog with a DAC. DDS provides very fine frequency resolution (micro-Hertz) with fast switching (nanoseconds). However, DDS is limited in output frequency by the DAC speed (typically below 1-3 GHz directly) and has higher spurious content than PLL-based synthesizers.