How do I calculate the loop bandwidth of a PLL for optimal phase noise performance?
PLL Loop Bandwidth Optimization
The PLL loop bandwidth determines the boundary between the two noise sources in the system: the crystal reference (excellent close-in noise, poor far-out noise after N multiplication) and the VCO (poor close-in noise, excellent far-out noise). The optimal bandwidth places this boundary at the frequency where both noise contributions are equal, minimizing the total integrated phase noise across all offset frequencies.
If the loop bandwidth is set too wide, the multiplied reference noise dominates at offset frequencies where the VCO noise would be lower, degrading the far-out phase noise. If the bandwidth is too narrow, the VCO's poor close-in noise is not corrected, degrading the near-carrier noise. The optimal bandwidth is typically 5-100 kHz for microwave PLLs, depending on the VCO and reference quality.
The loop filter determines both the bandwidth and the stability (phase margin). A passive second-order filter has two poles and one zero. The zero location sets the phase margin: placing the zero at approximately 1/4 the loop bandwidth provides 50-60° phase margin. Component values are calculated from: C1 = Icp × Kvco / (ωn² × N), R = 2 × ζ × ωn × N / (Icp × Kvco), where ωn is the natural frequency, ζ is the damping factor (0.7-1.0), Icp is the charge pump current, and Kvco is the VCO tuning sensitivity.
Loop filter (2nd order):
C₁ = Icp·Kvco / (ωn²·N)
R = 2ζωnN / (Icp·Kvco)
C₂ = C₁/10 (spur suppression)
Phase margin ≈ arctan(2ζ / √(√(4ζ⁴+1)-2ζ²))
For ζ = 0.707: PM ≈ 65°
Frequently Asked Questions
How do I measure the loop bandwidth?
Apply a small frequency step to the reference and measure the VCO output settling time. The loop bandwidth is approximately 0.35/(settling time to within 10%). Alternatively, measure the closed-loop phase noise transfer function with a signal source analyzer; the -3 dB point of the transfer function is the loop bandwidth.
What phase margin is acceptable?
Minimum 45° for adequate damping (no ringing). Preferred: 55-65° for well-damped response. Above 70°: the loop is over-damped and slower than necessary. Below 40°: the loop rings on frequency steps and has peaking in the phase noise transfer function.
Can I change the loop bandwidth dynamically?
Some PLL chips support programmable charge pump current, which changes the loop bandwidth without changing the filter components. This allows wide bandwidth for fast locking during frequency changes and narrow bandwidth for best phase noise during steady-state operation.