How do I design a phase locked loop for a local oscillator with low phase noise?
PLL LO Design
The PLL is the most common method for generating local oscillator signals because it combines the accuracy and stability of a crystal reference with the tunability of a VCO. The phase-frequency detector (PFD) compares the divided VCO output with the divided reference, generating an error signal that the loop filter integrates and applies to the VCO tuning input. When locked, the VCO output frequency is fout = N × fref/R, where N is the feedback divider ratio and R is the reference divider.
Phase noise inside the PLL loop bandwidth is dominated by the reference oscillator phase noise multiplied by 20·log10(N) (the divider noise multiplication). Phase noise outside the loop bandwidth is dominated by the VCO's free-running phase noise. The loop bandwidth should be set at the frequency where the reference contribution (including divider multiplication) equals the VCO phase noise. This crossover point minimizes the total integrated phase noise.
The loop filter is typically a passive RC network (charge pump output). Second-order (two capacitors, one resistor) provides adequate stability for most applications. Third-order (additional R-C section) provides better reference spur suppression. The filter component values are calculated from the loop bandwidth, phase margin (typically 50-60°), charge pump current, VCO gain (Kvco), and divider ratio.
Frequently Asked Questions
How do I choose the loop bandwidth?
Set the loop bandwidth at the crossover point of the reference noise (× 20logN) and VCO free-running noise. Typical: 10-100 kHz for microwave VCOs. Too wide: reference noise dominates. Too narrow: VCO noise dominates. An ideal loop bandwidth minimizes the integrated phase noise over the signal bandwidth.
What VCO phase noise do I need?
At 100 kHz offset: -100 to -120 dBc/Hz for communications LOs, -120 to -140 dBc/Hz for radar LOs. The VCO phase noise determines the far-out noise that the PLL cannot correct. Choose the lowest-noise VCO available at the required frequency.
How do I reduce reference spurs?
Reference spurs appear at multiples of the PFD comparison frequency (fref/R) at the PLL output. Reduce by: narrowing the loop filter bandwidth (more attenuation of spur energy), using a PLL chip with low charge pump current mismatch, and choosing the highest practical comparison frequency (which places spurs farther from the carrier where they are better attenuated by the loop filter).