Semiconductor and Device Technology III-V Semiconductors Informational

What is the fT and fmax of a transistor and how do they determine the maximum operating frequency?

Q: Can I operate above f_T if the gain is still positive?

f_T is the current gain unity frequency, not the power gain unity frequency. A transistor can provide useful power gain above f_T if f_max > f_T. Between f_T and f_max: the current gain is < 1 (< 0 dB), but the power gain (MAG or MSG) can still be positive because the output impedance is high enough that the power gain exceeds unity despite the current gain being below unity. Example: a SiGe HBT with f_T = 300 GHz and f_max = 500 GHz: at 350 GHz (above f_T): current gain = negative dB, but power gain ≈ 3-5 dB (usable for multi-stage amplification). In this case: f_max is the true upper limit for useful operation (not f_T). However: for practical amplifier design, operating above f_T is only done when absolutely necessary (the circuit becomes very sensitive to parasitics and layout).

Q: Why is f_max often higher than f_T?

f_max depends on both f_T and the gate (or base) resistance: f_max ≈ f_T / √(4×R_gate×2×pi×f_T×C_gd). If R_gate is very small (good metallization, short finger widths) and C_gd is small: f_max >> f_T. This is especially true for InP HEMTs: the high electron mobility and short gate give high f_T, and the low feedback capacitance (C_gd) gives even higher f_max. Example: InP HEMT with f_T = 600 GHz: if R_gate = 0.5 Ω, C_gd = 3 fF: f_max ≈ 600 / √(4×0.5×2×pi×600e9×3e-15) = 600/√(22.6e-3) = 600/0.15 = 4000 GHz. Too high because this simplified model neglects other parasitics, but it shows the trend. Actual f_max for InP HEMT: 1.0-1.5 THz (2.5× f_T). Conversely: GaN HEMTs often have higher R_gate (due to wider gate for power) and higher C_gd, so f_max/f_T ratio is 1.5-2.5 (lower than InP).

f_T (unity current gain frequency) and f_max (maximum oscillation frequency) are the two key figures of merit that determine the maximum usable frequency of a transistor: (1) f_T (cutoff frequency, unity current gain frequency): the frequency at which the short-circuit current gain (|h21|) of the transistor drops to unity (0 dB). Below f_T: the transistor provides current gain (|h21| > 1). Above f_T: the transistor provides no current gain (it cannot amplify). f_T is determined by the transit time of carriers through the active region: f_T = 1 / (2×pi×tau_total), where tau_total = tau_transit + tau_parasitic. tau_transit: the time for electrons to cross the channel (FET) or base (HBT). tau_parasitic: charging time of parasitic capacitances (C_gs, C_gd for FET; C_be, C_bc for HBT). To increase f_T: reduce the gate length (FET) or base width (HBT), and use materials with higher electron velocity (InP > GaAs > Si). (2) f_max (maximum oscillation frequency): the frequency at which the unilateral power gain (Mason invariant U) drops to unity. Above f_max: the transistor cannot provide power gain under any matching condition. f_max determines the highest frequency at which the transistor is useful as an amplifier or oscillator. f_max depends on f_T AND on the parasitic resistances: f_max = f_T / (2×sqrt(f_T × R_g × C_gd)) for a FET, or simplified: f_max ≈ f_T / (2×sqrt(R_gate × g_m × C_gd/C_gs)). f_max can be higher or lower than f_T: if gate resistance is very low and feedback capacitance (C_gd) is small: f_max >> f_T (common in InP HEMTs). If gate resistance is high: f_max < f_T. (3) Practical operating frequency: a transistor provides useful gain at frequencies up to approximately f_T/3 to f_max/3 (the one-third rule). At f = f_T/3: gain ≈ 10 dB (sufficient for amplifier design). At f = f_T: gain = 0 dB (useless). At f = f_max: power gain = 0 dB.

Category: Semiconductor and Device Technology

Updated: April 2026

Product Tie-In: Transistors, MMICs, Evaluation Boards

fT and fmax in RF Transistors

Understanding f_T and f_max is fundamental for selecting the right transistor technology and predicting circuit performance at high frequencies.

Measurement and Extraction

(1) f_T measurement: measure the S-parameters of the transistor at multiple frequencies (typically 1-40 GHz). Extract h21 (short-circuit current gain) from the S-parameters: h21 = -2×S21 / ((1-S11)(1+S22) + S12×S21). Plot |h21| in dB vs frequency. The current gain drops at -20 dB/decade (single pole). Extrapolate the -20 dB/decade line to 0 dB: the frequency at which it crosses 0 dB is f_T. (2) f_max measurement: extract Mason's unilateral gain (U) from the S-parameters. U represents the maximum power gain achievable with lossless reciprocal matching networks: U = |S21/S12 - 1|² / (4×(Re(1/S22)×Re(1/S11) - Re(S21/S12))). Plot U in dB vs frequency. U also drops at -20 dB/decade. Extrapolate to 0 dB: that frequency is f_max. (3) De-embedding: the measured S-parameters include the effects of the test fixture (pads, probes, interconnects). These must be removed (de-embedded) to obtain the intrinsic device f_T and f_max. Common de-embedding methods: open-short (removes pad parasitics), TRL (thru-reflect-line, removes probe and pad effects). Without de-embedding: the measured f_T/f_max is lower than the intrinsic value (the parasitics add to tau_total).

Technology Comparison

(1) InP HEMT (20 nm gate): f_T = 600-710 GHz. f_max = 1.0-1.5 THz. The fastest transistor technology. Enables circuits at 300+ GHz (sub-THz). Amplifiers demonstrated at 670 GHz. (2) SiGe HBT (130 nm BiCMOS): f_T = 300-350 GHz. f_max = 450-500 GHz. Enables circuits to 100-200 GHz. Standard for 77 GHz radar and 28 GHz 5G beamformers. (3) GaAs pHEMT (150 nm gate): f_T = 100-150 GHz. f_max = 200-300 GHz. Enables circuits to 40-100 GHz. Standard for cellular PA, LNA, switch (sub-6 GHz through Ka-band). (4) GaAs mHEMT (50-100 nm gate): f_T = 200-300 GHz. f_max = 400-600 GHz. Bridges the gap between pHEMT and InP. Used for 94 GHz PA and LNA. (5) GaN HEMT (150 nm gate): f_T = 40-100 GHz. f_max = 150-300 GHz. lower f_T than GaAs but compensated by high power: the power gain at 28 GHz is 10-15 dB with 5-10 W/mm output power. (6) CMOS (14 nm FinFET): f_T = 300-350 GHz. f_max = 350-400 GHz. Approaching SiGe HBT performance for analog/RF front-end. Enables highly integrated mmWave transceivers. (7) CMOS (7 nm FinFET): f_T = 400+ GHz. f_max = 450+ GHz. Pushes the usable CMOS RF frequency to 100+ GHz. However: the low breakdown voltage (0.9 V) limits power and dynamic range.

Design Implications

(1) The one-third rule: design amplifiers at f < f_T/3 (or f_max/3) for adequate gain (≥ 10 dB). At f = f_T/2: available gain ≈ 6 dB (marginal; may need cascading). At f = f_T: gain = 0 dB (cannot design at this frequency). (2) Multi-stage amplifiers: if f_T = 300 GHz and the design frequency is 94 GHz (f_T/3.2): per-stage gain ≈ 7-10 dB. For a required total gain of 25 dB: need 3-4 stages. Each stage must be stable (conditional stability becomes an issue when the transistor gain is low). (3) Oscillator design: the transistor must provide enough negative resistance to sustain oscillation. This requires gain > 1 at the oscillation frequency. Practical oscillator frequency: up to approximately f_max/2 (higher than amplifiers because the oscillator does not need to provide net output power gain). (4) Technology selection: if the design frequency is known, select the cheapest technology whose f_T/3 exceeds the design frequency. For 28 GHz: f_T > 84 GHz → GaAs pHEMT (f_T = 100-150 GHz) or SiGe HBT (f_T = 300 GHz) both work. Choose based on other requirements (power, noise, integration). For 77 GHz: f_T > 231 GHz → SiGe HBT (f_T = 300 GHz) works. GaAs pHEMT (f_T = 150 GHz, f_T/3 = 50 GHz) is marginal. Use GaAs mHEMT or InP. For 200 GHz: f_T > 600 GHz → only InP HEMT.

Transistor Frequency Limits

f_T = 1/(2πτ_total) Hz
f_max ≈ f_T/(2√(R_g·g_m·C_gd/C_gs))
Useful freq < f_T/3 (or f_max/3)
|h21| drops at -20 dB/decade
InP: f_T=700GHz, SiGe: 300, GaAs: 150

Common Questions

Frequently Asked Questions

Can I operate above f_T if the gain is still positive?

f_T is the current gain unity frequency, not the power gain unity frequency. A transistor can provide useful power gain above f_T if f_max > f_T. Between f_T and f_max: the current gain is < 1 (< 0 dB), but the power gain (MAG or MSG) can still be positive because the output impedance is high enough that the power gain exceeds unity despite the current gain being below unity. Example: a SiGe HBT with f_T = 300 GHz and f_max = 500 GHz: at 350 GHz (above f_T): current gain = negative dB, but power gain ≈ 3-5 dB (usable for multi-stage amplification). In this case: f_max is the true upper limit for useful operation (not f_T). However: for practical amplifier design, operating above f_T is only done when absolutely necessary (the circuit becomes very sensitive to parasitics and layout).

Why is f_max often higher than f_T?

f_max depends on both f_T and the gate (or base) resistance: f_max ≈ f_T / √(4×R_gate×2×pi×f_T×C_gd). If R_gate is very small (good metallization, short finger widths) and C_gd is small: f_max >> f_T. This is especially true for InP HEMTs: the high electron mobility and short gate give high f_T, and the low feedback capacitance (C_gd) gives even higher f_max. Example: InP HEMT with f_T = 600 GHz: if R_gate = 0.5 Ω, C_gd = 3 fF: f_max ≈ 600 / √(4×0.5×2×pi×600e9×3e-15) = 600/√(22.6e-3) = 600/0.15 = 4000 GHz. Too high because this simplified model neglects other parasitics, but it shows the trend. Actual f_max for InP HEMT: 1.0-1.5 THz (2.5× f_T). Conversely: GaN HEMTs often have higher R_gate (due to wider gate for power) and higher C_gd, so f_max/f_T ratio is 1.5-2.5 (lower than InP).

How do I extract f_T from S-parameter data?

Step-by-step: (1) Measure S-parameters from 1 GHz to the maximum frequency of your VNA (40-67 GHz for standard VNA, 110+ GHz for mmWave VNA). (2) De-embed the fixture parasitics (subtract pad capacitance and probe contact inductance using open/short structures). (3) Convert S-parameters to H-parameters: h21 can be computed from the S-parameter matrix. (4) Plot |h21|² in dB vs log(frequency). It should follow a -20 dB/decade slope (20 dB per decade decrease). (5) Fit a straight line to the -20 dB/decade region (avoid frequencies near the VNA noise floor and frequencies below where the gain saturates). (6) Extrapolate the line to 0 dB. The frequency at the 0 dB crossing is f_T. Note: the slope should be exactly -20 dB/decade (6 dB/octave). If the slope is steeper: there may be additional parasitic poles (second-order effects). If the slope varies: the transistor may have non-ideal behavior at certain frequencies (substrate coupling, feedback resonance). Use the portion of the curve with consistent -20 dB/decade slope for the extrapolation.

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