Semiconductor and Device Technology III-V Semiconductors Informational

What is the difference between enhancement mode and depletion mode GaN transistors?

Q: What about GaN for 5G base station PAs?

All major 5G base station PAs (both sub-6 GHz and mmWave gNB) use D-mode GaN on SiC: sub-6 GHz ( 50% with digital predistortion (DPD). Suppliers: Wolfspeed (Cree), Qorvo, NXP, Ampleon. mmWave (28/39 GHz): GaN PAs with 5-10 W saturated output power per device. PAE ≈ 25-35%. Used in phased array beamforming modules. Suppliers: Qorvo, Wolfspeed, MACOM. The negative gate bias is managed by the beamforming IC (which generates the V_GS for each PA element from a single-chip charge pump).

GaN transistors are available in two fundamental operating modes, defined by their threshold voltage (V_th): (1) Depletion mode (D-mode): the transistor is ON (conducting) at V_GS = 0 V. The gate must be biased negative (V_GS < 0 V) to turn it off. Threshold voltage: V_th = -1 to -4 V (negative). Bias: requires a negative gate supply voltage (typically -2 to -5 V). The drain is connected to a positive supply (+28 to +50 V). This requires a dual-polarity power supply (positive for drain, negative for gate). Sequencing: the negative gate voltage must be applied BEFORE the positive drain voltage is turned on. If VDD is applied without V_GS: the transistor is fully on (V_GS = 0), drawing maximum current. This can exceed the safe operating area and destroy the device. After operation: VDD must be turned off BEFORE the gate voltage is removed. This power supply sequencing is a critical design requirement. Most RF GaN HEMTs are depletion mode because the AlGaN/GaN 2DEG (two-dimensional electron gas) naturally forms at the interface without any bias. (2) Enhancement mode (E-mode): the transistor is OFF at V_GS = 0 V. The gate must be biased positive (V_GS > 0 V) to turn it on. Threshold voltage: V_th = +0.5 to +2 V (positive). Bias: requires only a positive gate voltage (+1 to +5 V). The drain supply is still positive (+28 to +50 V). Advantages: no negative supply needed (simplifies the power supply design). Normally-off operation (the device is safe if the gate control fails; the transistor turns off and does not pass current). No power supply sequencing required. Disadvantages: current E-mode GaN processes have lower performance than D-mode: lower transconductance (g_m), lower maximum current (I_DSS), and lower fT/fmax. The gate voltage swing is limited (must stay below the Schottky diode forward voltage, approximately +2 V). This limits the maximum current and output power compared to D-mode.

Category: Semiconductor and Device Technology

Updated: April 2026

Product Tie-In: Transistors, MMICs, Evaluation Boards

GaN D-Mode vs E-Mode

The D-mode vs E-mode choice affects not just the transistor biasing but the entire circuit architecture, power supply design, and system safety.

Depletion Mode Circuits

(1) Bias circuit: D-mode GaN requires a negative gate voltage generator. Options: charge pump: a small IC that generates -5 V from the +5 V logic supply. Simple, low cost. Current capability: 10-50 mA (adequate for biasing the gate). Inverting DC-DC converter: a small switching regulator that generates -5 V. Higher current capability (> 100 mA) for biasing multiple devices. Resistive divider from a negative rail (if the system already has a -12 V supply): simple and reliable. (2) Sequencing circuit: a power supply sequencing controller ensures: step 1: negative gate voltage is established and stable. Step 2: positive drain voltage is ramped up slowly (over 1-10 ms). At shutdown: drain voltage is removed first, then gate voltage. Sequencing ICs are available (e.g., Analog Devices ADM1186, Microchip MIC2789). Alternatively: the gate bias circuit can be powered from the drain supply through a voltage regulator (the gate voltage is always present when VDD is present). (3) Protection: if the gate control fails (open circuit): the gate floats to 0 V. The transistor conducts maximum current. This can destroy the PA and cause thermal runaway. Protection: add a pull-down resistor from the gate to the negative supply (ensures the gate stays negative if the control circuit fails). Add overcurrent protection on the drain supply (current-limiting fuse or electronic current limiter).

Enhancement Mode Developments

(1) E-mode GaN technologies: p-GaN gate: a layer of p-type GaN is placed on top of the AlGaN barrier. The p-GaN depletes the 2DEG under the gate, creating E-mode behavior. Used in: power switching GaN (EPC, GaN Systems, Infineon). For RF: the p-GaN gate has higher gate resistance, limiting the fmax. The RF performance is improving with each generation. Gate recessing: the AlGaN barrier under the gate is thinned (etched) to partially deplete the 2DEG. This shifts V_th positive. The recessing must be very precise (± 1 nm) to achieve consistent V_th. Used in: some RF E-mode GaN processes (Qorvo, Wolfspeed). Fluorine implantation: fluorine ions are implanted into the AlGaN barrier under the gate. The negative fluorine charge depletes the 2DEG, shifting V_th positive. Still in research/limited production. (2) Cascode configuration: an alternative to E-mode. A low-voltage E-mode Si MOSFET (normally off) is connected in series with a D-mode GaN HEMT. The Si MOSFET controls the on/off state (normally off). The GaN HEMT handles the high voltage. The combination behaves as a normally-off, high-voltage device. Used extensively in power electronics (Transphorm, GaN Systems). Less common in RF (the Si MOSFET adds capacitance and inductance).

GaN Operating Modes

D-mode: V_th = -1 to -4V, ON at V_GS=0
E-mode: V_th = +0.5 to +2V, OFF at V_GS=0
D-mode needs: negative bias + sequencing
E-mode needs: positive gate only
Cascode: E-mode Si + D-mode GaN = normally-off

Common Questions

Frequently Asked Questions

Which is more common in RF applications?

D-mode is dominant in RF GaN: > 95% of RF GaN MMICs and discrete transistors are D-mode. The reason: D-mode provides higher performance (more current, higher gain, higher fmax) because the AlGaN/GaN 2DEG is at its maximum density (no gate modification needed). The negative supply and sequencing are accepted trade-offs in professional RF systems (base stations, radar, military). E-mode RF GaN is emerging for: driver-stage PAs (where the power level is low enough that the E-mode performance penalty is acceptable), integrated PAs with digital control (the E-mode simplifies the digital interface), and switch applications (where normally-off behavior is a safety requirement).

Is power supply sequencing really necessary?

Absolutely. Violating the sequencing can cause immediate and permanent device failure: (1) Applying VDD without V_GS: the transistor is fully on. I_DS = I_DSS (maximum drain current). For a large GaN PA: I_DSS can be 5-20 A at VDD = 50 V. Power dissipation: 250-1000 W. The device overheats and fails in milliseconds. (2) Removing V_GS before VDD: same situation (the gate goes to 0 V, the transistor turns fully on). The protection: sequencing circuits are inexpensive (< $1 for a sequencing IC + a few passives). Every production GaN PA board includes sequencing. Skipping sequencing to save cost or complexity is never acceptable.

What about GaN for 5G base station PAs?

All major 5G base station PAs (both sub-6 GHz and mmWave gNB) use D-mode GaN on SiC: sub-6 GHz (< 6 GHz): GaN Doherty PAs at 28-50 V drain voltage. Power: 10-100 W per PA. PAE > 50% with digital predistortion (DPD). Suppliers: Wolfspeed (Cree), Qorvo, NXP, Ampleon. mmWave (28/39 GHz): GaN PAs with 5-10 W saturated output power per device. PAE ≈ 25-35%. Used in phased array beamforming modules. Suppliers: Qorvo, Wolfspeed, MACOM. The negative gate bias is managed by the beamforming IC (which generates the V_GS for each PA element from a single-chip charge pump).

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