How does clock harmonics from a digital circuit couple into an adjacent RF receiver on the same PCB?

How do clock harmonics from a digital circuit couple into an adjacent RF receiver on the same PCB? Digital clocks are the most common source of interference to RF receivers in mixed-signal designs because clock signals produce strong, narrowband harmonics that can fall directly into RF receive bands: (1) Clock harmonic spectrum: a digital clock with frequency f_clk generates harmonics at: f_n = n × f_clk (n = 1, 2, 3, ...). The harmonic amplitude decreases with order: for a trapezoidal clock with rise time t_r: harmonics decrease at 20 dB/decade up to f_corner = 1/(π × t_r). Above f_corner: harmonics decrease at 40 dB/decade. Example: 100 MHz clock, t_r = 1 ns → f_corner = 318 MHz. The 24th harmonic (f_24 = 2.4 GHz) falls in the Wi-Fi 2.4 GHz band. Its level (relative to the fundamental) ≈ -27 dB at the 24th harmonic. If the fundamental is 1V (0 dBV): the 24th harmonic is approximately -27 dBV = 45 mV. (2) Coupling mechanisms: radiated coupling: the clock trace acts as an antenna, radiating EMI that couples to the RF antenna or input trace. Conducted coupling (shared ground/power): harmonics travel through the power distribution network (PDN) to the RF circuit. Parasitic coupling: capacitive and inductive coupling between the clock trace and the RF trace (near-field coupling). Substrate coupling: in integrated circuits (SoC), harmonics travel through the silicon substrate. (3) Impact on RF receiver: the RF receiver has extreme sensitivity (-80 to -100 dBm for Wi-Fi/cellular). A clock harmonic that reaches the receiver input at even -70 dBm will desensitize the receiver by 10-30 dB. The harmonic appears as a narrowband interferer (spur) in the received spectrum. If the harmonic falls on the desired channel: it directly corrupts the received signal (increases EVM, reduces SNR). If it falls near the channel: it may be partially rejected by the IF filter, but strong harmonics can still cause mixer spurious responses. (4) The challenge: the clock harmonic level at the source is approximately -30 to -50 dBm. The required level at the RF receiver input: < -90 to -110 dBm (to avoid desensitization). Required isolation: 60-80 dB. Achieving 60-80 dB of isolation between a digital clock and an RF receiver on the same PCB requires: physical separation, shielding, filtering, and careful ground management.