Transmission Lines

CPW Mode Analysis

Q: What is the difference between the CPW mode and the slotline mode?

The desired CPW (even) mode has the two ground planes at the same potential, with the electric field pointing symmetrically from the center conductor outward into both slots; it is the quasi-TEM coupled-slot mode the line is designed to carry. The slotline (odd) mode is a parasitic coupled mode in which the two ground planes sit at opposite potentials, so current circulates around the center strip rather than along it. The slotline mode has a different, dispersive phase velocity and is not TEM-like, so once energy couples into it at a bend, T-junction, or asymmetric discontinuity, it radiates and produces resonant dips and ripple in the transmission response. Air bridges or bond wires placed across the slots tie the two grounds together and short out the slotline mode while leaving the CPW mode unaffected.

Q: How do air bridges suppress the unwanted CPW slotline mode?

An air bridge is a small metal strap (in MMIC processes a plated metal span over a sacrificial layer, on PCBs a bond wire or via fence) that electrically connects the left and right ground planes across the center conductor. Because the slotline mode requires the two grounds to be at different potentials, tying them together forces that potential difference to zero and suppresses the mode. The CPW even mode keeps both grounds at the same potential by definition, so the bridge is nearly invisible to it, adding only a small shunt inductance. Designers place air bridges symmetrically at every discontinuity (bends, tees, gaps) and periodically along long lines, typically every lambda/10 to lambda/8 at the highest operating frequency, so no parasitic slot resonance has room to build up. On a 50-ohm GaAs CPW at 60 GHz that spacing is roughly 250 to 350 micrometers.

Q: Why does conductor-backed CPW support a parasitic microstrip mode?

Conductor-backed CPW (CBCPW) adds a ground plane on the back of the substrate to improve heat sinking and mechanical rigidity. That backside ground creates a parallel-plate, microstrip-like mode between the top conductors and the bottom ground. This parasitic mode couples to the intended CPW mode and, at frequencies where the substrate becomes a fraction of a wavelength thick, forms parallel-plate resonances that leak power and spike the loss. The cure is to stitch the top grounds to the bottom ground with a dense via fence (via pitch under lambda/10) so the cavity cannot resonate, and to keep the substrate electrically thin. The first parallel-plate resonance for a substrate of thickness h and relative permittivity epsilon_r occurs near c divided by (2 h times the square root of epsilon_r).

Q: At what frequency does the CPW substrate mode start to cause radiation loss?

As frequency rises the quasi-TEM CPW mode begins to phase-match and couple to the lowest surface-wave (substrate) mode supported by the dielectric, primarily the TM0 mode, which has no cutoff but becomes strongly bound only above a threshold. A common engineering rule keeps the substrate electrically thin, with thickness h held below about 0.12 times the free-space wavelength divided by the square root of (epsilon_r minus 1), so leakage into surface waves stays negligible. For a 100-micrometer GaAs substrate (epsilon_r approximately 12.9) that keeps clean CPW operation up to roughly 100 to 110 GHz; thinning the wafer to 50 micrometers pushes the onset of surface-wave radiation well above 200 GHz, which is why millimeter-wave MMICs use thinned substrates.

/see-pee-dub-uhl-yoo mohd uh-nal-uh-sis/

A design discipline that sorts out which electromagnetic modes a coplanar waveguide actually carries. The intended signal travels in the even, quasi-TEM CPW mode, where both ground planes sit at the same potential. Three unwanted modes compete with it: the odd slotline mode (grounds at opposite potential), a parasitic microstrip-like mode on conductor-backed CPW, and dielectric substrate (surface-wave) modes that appear once the wafer is too thick. Mode analysis predicts where these couple, at bends, tees, and asymmetric gaps, and prescribes air bridges, via fences, and substrate thinning to keep all the power in the wanted mode. The technique is central to millimeter-wave MMIC and probe-station design from a few GHz to beyond 100 GHz.

Category: Transmission Lines

Wanted mode: Even quasi-TEM

Main parasitic: Odd slotline mode

The Mode Spectrum of a Coplanar Waveguide

A coplanar waveguide places a center conductor and two ground planes on the same surface, separated by two slots. Because there are three conductors on one face, the structure supports more than one transmission mode, and the job of mode analysis is to identify each one, predict its phase velocity, and ensure that energy stays in the mode the designer wants. The wanted mode is the even (CPW) mode: the two grounds are tied to the same potential and the electric field fans symmetrically from the center strip into both slots. It is quasi-TEM, has low dispersion, and carries a clean 50-ohm signal across a wide band when the line is built correctly.

The principal troublemaker is the odd, or slotline, mode. Here the two ground planes are at opposite potentials, so the field configuration is that of a slotline rather than a coplanar waveguide. This mode is genuinely dispersive, its phase velocity changes with frequency, and it radiates readily. Any asymmetry, a bend, a T-junction, a series gap, or simply unequal ground widths, couples power from the even mode into the odd mode. The result is ripple, resonant suction dips, and unexplained insertion loss in the measured S-parameters. Because the two modes have different propagation constants, even a small mode-conversion coefficient builds into a sharp resonance over the length of a long line.

Two further modes appear once the substrate enters the picture. Adding a backside ground to make conductor-backed CPW introduces a microstrip-like parallel-plate mode between the top conductors and the bottom ground, which forms cavity resonances unless the grounds are stitched together with a dense via fence. Separately, as frequency climbs the CPW mode can phase-match the lowest TM surface-wave mode of the dielectric and leak power into the substrate; keeping the wafer electrically thin pushes that onset well above the operating band.

Suppressing the Slotline Mode with Air Bridges

The classic fix is the air bridge, a short metal strap that electrically connects the left and right ground planes over the center conductor. Since the slotline mode requires a potential difference between the two grounds, shorting them together suppresses it, while the even CPW mode (both grounds already equal) barely notices the bridge beyond a small shunt inductance. Designers place bridges symmetrically at every discontinuity and periodically along straight runs, roughly every λ/10 to λ/8 at the top frequency, so no slot resonance has room to develop.

Governing Relationships

Even (CPW) mode characteristic impedance, quasi-static:
Z₀ ≈ (30π / √ε_eff) × K(k′) / K(k)

Conformal-mapping ratio (center width a, ground spacing b):
k = a / b, k′ = √(1 − k²)

Effective permittivity (thick substrate limit):
ε_eff ≈ (ε_r + 1) / 2

Parallel-plate resonance onset (conductor-backed CPW):
f_res ≈ c / (2 h √ε_r)

Air-bridge spacing guideline:
d_bridge ≤ λ_g / 8 at f_max

Where K is the complete elliptic integral of the first kind, ε_eff is effective permittivity, ε_r is substrate relative permittivity, h is substrate thickness, c is the speed of light, and λ_g is guided wavelength. Example: 50-ohm GaAs CPW (ε_r ≈ 12.9) at 60 GHz needs bridges about every 250 to 350 μm.

CPW Mode Inventory

Mode	Ground potentials	Field type	Behavior	Suppression method
Even (CPW)	Both equal	Quasi-TEM, low dispersion	Wanted signal mode	None (this is the goal)
Odd (slotline)	Opposite	Dispersive, radiating	Ripple, resonant dips	Air bridges / bond wires
Microstrip (CBCPW)	Top vs. backside	Parallel-plate	Cavity resonances, leakage	Via fence, thin substrate
Substrate (TM₀)	Surface wave	Bound to dielectric	Radiation loss at high f	Thin / high-resistivity wafer
Higher-order CPW	Both equal	Non-TEM	Onset when b > λ/2	Keep slot+strip < λ/2

Common Questions

Frequently Asked Questions

What is the difference between the CPW mode and the slotline mode?

The desired CPW even mode holds both ground planes at the same potential, with the field fanning symmetrically from the center strip into both slots; it is the quasi-TEM mode the line is meant to carry. The slotline odd mode sits the two grounds at opposite potentials, so it is dispersive and radiates. Once a bend, tee, or asymmetric gap couples power into it, the response shows ripple and resonant dips. Air bridges tie the grounds together and short out the slotline mode while leaving the CPW mode untouched.

How do air bridges suppress the unwanted CPW slotline mode?

An air bridge connects the left and right grounds across the center conductor. The slotline mode needs a potential difference between the two grounds, so tying them together drives that difference to zero and suppresses the mode. The even CPW mode keeps both grounds equal by definition, so the bridge adds only a small shunt inductance. Place bridges symmetrically at every discontinuity and every λ/10 to λ/8 along long lines; on 50-ohm GaAs CPW at 60 GHz that is roughly 250 to 350 μm.

Why does conductor-backed CPW support a parasitic microstrip mode?

Adding a backside ground for heat sinking and rigidity creates a parallel-plate, microstrip-like mode between the top conductors and the bottom ground. It couples to the wanted CPW mode and forms parallel-plate resonances that leak power and spike loss once the substrate becomes a fraction of a wavelength thick. The cure is a dense via fence (pitch under λ/10) stitching top to bottom ground, plus an electrically thin substrate. The first resonance sits near c / (2 h √ε_r).

At what frequency does the CPW substrate mode start to cause radiation loss?

As frequency rises the CPW mode begins to phase-match the lowest surface-wave (TM₀) mode of the dielectric and leak power into it. A common rule keeps the substrate thickness h below about 0.12 × λ₀ / √(ε_r − 1). For a 100-μm GaAs wafer (ε_r ≈ 12.9) that supports clean operation to roughly 100 to 110 GHz; thinning to 50 μm pushes surface-wave radiation above 200 GHz, which is why millimeter-wave MMICs use thinned substrates.

Related Terms

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