Conductor-Backed CPW
Why a Backside Ground Changes the Picture
Standard coplanar waveguide confines its quasi-TEM field in the two slots between a center conductor and the coplanar grounds on a single metal layer, which makes it convenient for shunt components and probe measurement because both signal and ground are reachable from the top. Many practical builds, however, place that CPW pattern on a thin substrate bonded to a metal carrier, or fabricate it on a board whose bottom layer is already a solid ground for other circuitry. The presence of that lower conductor turns the structure into conductor-backed CPW, and the field is no longer purely coplanar: a fraction of it now terminates downward on the backside ground, mixing CPW behavior with microstrip behavior.
The immediate electrical consequence is added shunt capacitance. The backside ground forms a parallel-plate capacitance with the top metal, in parallel with the coplanar slot capacitance, so the total capacitance per unit length rises and the line impedance falls. The strength of the coupling scales with the ratio of substrate thickness h to the slot and conductor dimensions. When h is large compared with the slot width, the structure behaves almost like ungrounded CPW; as h shrinks toward the slot width, the backside ground dominates and the line approaches microstrip, with a higher effective dielectric constant and stronger frequency dispersion at the upper end of the band.
The second consequence is parasitic modes. The two top grounds and the backside ground bound a parallel-plate cavity, which supports a TM parallel-plate mode and can radiate into substrate or surface-wave modes if left open. Energy that couples into these modes shows up as excess loss, ripple, and crosstalk between adjacent lines. The standard remedy is a fence of plated grounding vias stitching the top grounds to the bottom ground along both sides of the line, spaced closely enough that the fence acts as a solid wall at the highest operating frequency.
Impedance and Mode Suppression Equations
εeff ≈ (εr + 1)/2 (wide-slot CPW) → trending toward εr as h decreases
Characteristic impedance (quasi-static):
Z0 = √εeff / (c × C) = 1 / (c × √(C × Cair)) where C is the total (coplanar + parallel-plate) capacitance per unit length and εeff = C / Cair
Via fence pitch (mode suppression):
p < λg/10 = c / (10 × fmax × √εeff)
Where εr = substrate relative permittivity, h = substrate thickness, c = speed of light, fmax = highest operating frequency, p = via pitch. Example: alumina εr=9.8, εeff≈6 at 40 GHz → λg≈3.06 mm, so p < 0.3 mm.
CBCPW vs. CPW vs. Microstrip
| Property | Conductor-Backed CPW | Ungrounded CPW | Microstrip |
|---|---|---|---|
| Ground access | Top + backside | Top only | Backside only |
| Shunt component mounting | Easy (top grounds) | Easy (top grounds) | Requires via to ground |
| Heat sinking | Good (backside metal) | Poor | Good (backside metal) |
| Parasitic parallel-plate mode | Yes (needs via fence) | No | No |
| Dispersion at mmWave | Moderate to high | Low to moderate | Moderate |
| Sensitivity to substrate thickness | Moderate | Low | High |
| Typical Z0 range | 30 to 60 Ω | 40 to 75 Ω | 20 to 90 Ω |
Frequently Asked Questions
How does adding a backside ground change CPW impedance and dispersion?
The lower ground adds parallel-plate capacitance in parallel with the slot capacitance, raising capacitance per unit length and lowering Z0 versus ungrounded CPW of the same top geometry. On 254 micron alumina, a 50 Ω CPW can drop to 38 to 42 Ω once backed, so the center conductor must widen or the gaps narrow. As substrate thickness approaches the slot width, the field turns microstrip-like, raising εeff and dispersion at mmWave.
Why do via fences suppress the parallel-plate mode in CBCPW?
The top and bottom grounds bound a parallel-plate region that supports a parasitic TM mode and leaks into substrate modes. Stitching the top grounds to the bottom ground with closely spaced vias shorts that region and ties both grounds to one potential. Keep the via pitch between λg/20 and λg/10 at fmax so the fence acts as a wall; on a thin alumina substrate at 40 GHz (εeff≈6, λg≈3 mm) that is roughly a 150 to 300 micron pitch.
When should I choose CBCPW over microstrip for a millimeter-wave circuit?
Pick CBCPW when you need top-side ground access for shunt components, wire-bond pads, or air-bridge crossovers, and when the backside metal is needed for heat sinking from power devices or for stiffening a thin substrate. It also keeps line width less dependent on substrate thickness at 60 to 110 GHz. Microstrip wins for lowest radiation loss, the simplest single-ground stackup, no via fencing, and long low-loss feed runs.