How do I design a test coupon for verifying the impedance and loss of a high speed PCB fabrication?

Designing a test coupon for verifying the impedance and loss of a high-speed PCB fabrication creates a set of calibrated test structures on the same PCB panel as the production board, enabling: impedance verification (confirming that the fabricated trace impedance matches the design target within tolerance, typically ±10%), loss measurement (measuring the insertion loss per unit length at the frequencies of interest and comparing to the design simulation; this verifies the Dk (dielectric constant) and Df (loss tangent) of the laminate material as actually fabricated), and skew measurement (verifying that differential pair skew is within specification). The test coupon design: include traces on every signal layer and impedance class used in the design (e.g., 50 ohm single-ended microstrip, 100 ohm differential stripline, 85 ohm single-ended stripline). Each test structure consists of: a TDR coupon (a short trace, approximately 6 inches (15 cm), with probe launch pads at both ends; an SMA connector or impedance-controlled probe pad provides the TDR measurement access; the TDR (Time-Domain Reflectometry) measurement shows the impedance vs. distance along the trace, revealing any impedance variations from the design), a loss coupon (two traces of different lengths (e.g., 6 inch and 12 inch, or 3 inch and 9 inch) on the same layer and impedance class; the insertion loss difference between the long and short trace gives the per-unit-length loss, canceling out the connector/launch transition loss; this differential length method provides accurate loss measurement), and reference structures (a THRU (zero-length test), OPEN, and SHORT for calibration).