CPW Gap Design
How the Slot Width Sets CPW Impedance
In a coplanar waveguide the signal travels on a center strip of width s, flanked on the same surface by two ground planes separated from the strip by equal gaps of width g. The fields concentrate in those two slots, so the gap is not a secondary detail but a primary impedance-setting dimension. The closed-form analysis of CPW, developed by Wen in 1969 using conformal mapping, shows that the line impedance is a function only of the aspect ratio k = s/(s+2g). This is a powerful property: a designer can scale s and g up or down together to keep a constant 50 Ω while trading line size against current handling and conductor loss.
The independence from absolute size holds as long as the substrate is electrically thick relative to the slots and the conductors are thin. Once the ground-to-ground span s+2g approaches a tenth of the guided wavelength, or once the gap becomes comparable to the substrate thickness on a conductor-backed CPW, the simple ratio model breaks down and parasitic parallel-plate modes, dispersion, and radiation must be accounted for. This is why millimeter-wave layouts keep gaps small and add via fences along the grounds rather than simply widening the slots.
Designers usually fix the impedance target first, then pick a strip width compatible with the photolithography and current budget, and finally solve for the gap that yields the required k. Narrow gaps below about 10 μm become sensitive to etch tolerance, where a 1 μm error shifts impedance by several ohms, while very wide gaps invite radiation. The sweet spot for most 50 Ω alumina or quartz circuits lands between 20 and 80 μm.
Governing Equations
k = s / (s + 2g) k′ = √(1 − k2)
Characteristic impedance (conformal mapping):
Z0 = (30π / √εeff) × [K(k′) / K(k)] Ω
Effective permittivity (thick substrate):
εeff ≈ (εr + 1) / 2
Where s = center-strip width, g = slot (gap) width, K(k) = complete elliptic integral of the first kind, εr = substrate relative permittivity. Example: alumina (εr = 9.8), s = 40 μm, g = 26 μm → k ≈ 0.435, εeff ≈ 5.4, Z0 ≈ 50 Ω.
Gap Width vs. Performance Trade-offs
| Gap regime (50 Ω alumina) | Typical g | Strip s | Conductor loss | Radiation risk | Best use |
|---|---|---|---|---|---|
| Tight (compact) | 10 to 20 μm | 15 to 30 μm | High | Very low | Dense MMIC routing |
| Moderate | 20 to 50 μm | 30 to 80 μm | Medium | Low | General 50 Ω interconnect |
| Wide (low loss) | 50 to 100 μm | 80 to 160 μm | Low | Moderate | Resonators, low-loss lines |
| Very wide | > 100 μm | > 160 μm | Lowest | High | Avoid above 0.1 λg span |
Frequently Asked Questions
Should I make the CPW gap larger or smaller to raise the characteristic impedance?
Widen the gap g relative to the strip width s. Impedance depends on k = s/(s+2g), so a thin strip with wide gaps gives high Z0. On 254 μm alumina with a 40 μm strip, 60 μm gaps sit near 50 Ω; doubling the gaps to 120 μm pushes toward 70 Ω. Because impedance follows the ratio, you can scale s and g together to hold 50 Ω while shrinking or widening the line.
How does the CPW gap affect conductor loss and unloaded Q?
Narrow gaps crowd the field and concentrate edge current, raising conductor loss and lowering Q. Widening the gap spreads the field and improves Q until radiation and surface-wave loss take over. On a 50 Ω line, attenuation often drops 20 to 40 percent as gaps widen from 20 to 50 μm, then flattens. Resonators typically use 30 to 100 μm gaps to balance conductor loss against radiation.
What is the maximum CPW gap before radiation and parasitic modes become a problem?
Keep the ground-to-ground span s+2g below about 0.1λg, and on conductor-backed CPW keep g under roughly half the substrate thickness. At 30 GHz on alumina (εeff ≈ 5.5, λg ≈ 4.3 mm) the span should stay under about 400 μm. Gaps larger than half the substrate thickness let the parallel-plate mode couple in; via fences along the grounds raise the cutoff and allow slightly wider gaps.