What is the substrate definition procedure for a multilayer PCB in an EM simulator?
EM Simulator Substrate Definition
Accurate substrate definition is the foundation of reliable EM simulation for multilayer PCBs. Errors in the stackup definition directly cause errors in impedance, loss, and coupling predictions, which lead to design failures that are expensive to fix in hardware.
- Performance verification: confirm specifications against the application requirements before finalizing the design
- Environmental factors: temperature range, humidity, and vibration affect long-term reliability and parameter drift
- Cost vs. performance: evaluate whether the application demands premium components or standard commercial grades
- Interface compatibility: verify impedance, connector type, and mechanical form factor match the system architecture
Frequently Asked Questions
How do I handle via transitions in the substrate?
Vias connect conductor layers through the dielectric stack. In the substrate definition: define the via connection as a vertical conductor between the specified layer pairs. Enter the drill diameter (PTH vias: 8-15 mil typical drill, microvias: 3-5 mil), pad diameter (drill + 8-10 mil annular ring), and antipad diameter (clearance hole in intermediate ground planes). The EM simulator models the via's parasitic inductance and capacitance, which affect the signal integrity at high frequencies. Blind and buried vias connect non-adjacent layers and must be defined with the correct start and end layers.
What about solder mask?
Solder mask is a 15-25 um thick dielectric layer (Er approximately 3-4, tan_delta approximately 0.01-0.02) applied over the outer copper layers. At frequencies below 10 GHz: the solder mask effect is negligible for most designs. At frequencies above 10 GHz: the solder mask changes the effective impedance by 2-5 ohms and increases loss by 0.05-0.1 dB/cm. If the solder mask is removed from the signal traces (solder mask opening): define the trace as exposed copper. If the solder mask covers the signal traces: add a dielectric layer above the outer copper with the solder mask properties.
How accurate is the substrate definition for flexible PCBs?
Flexible PCBs (polyimide substrate) present additional challenges: the polyimide Er is approximately 3.2-3.5 with tan_delta approximately 0.005-0.01 (higher loss than FR-4 at the same frequency). The adhesive layers (used to bond polyimide layers to copper) have different Er than the polyimide and add additional dielectric layers to the stack. The copper on flex is typically rolled annealed (RA) with lower roughness than electrodeposited (ED) copper, resulting in lower conductor loss. Define each adhesive and polyimide layer separately in the substrate stack.