What is the co-simulation workflow between an EM solver and a circuit simulator for amplifier design?
EM-Circuit Co-Simulation for Amplifiers
Co-simulation is the standard design methodology for RF amplifiers above 1 GHz. Below 1 GHz: ideal circuit models are usually adequate. Above 1 GHz: the parasitic effects captured by EM simulation significantly affect the amplifier's gain, stability, and noise figure.
- Performance verification: confirm specifications against the application requirements before finalizing the design
- Environmental factors: temperature range, humidity, and vibration affect long-term reliability and parameter drift
- Cost vs. performance: evaluate whether the application demands premium components or standard commercial grades
Frequently Asked Questions
How much does EM simulation improve accuracy?
Compared to ideal circuit simulation: EM co-simulation typically improves the agreement between simulated and measured amplifier performance from ±3-5 dB to ±0.5-1 dB for gain, from ±5-10 dB to ±2-3 dB for input/output return loss, and from qualitative to quantitative for stability assessment (parasitic feedback paths that cause oscillation are only captured by EM simulation). The improvement is most significant for: narrowband amplifiers (where the matching bandwidth is sensitive to parasitics), MMIC designs (where coupling between on-chip elements is strong), and frequencies above 10 GHz (where layout parasitics approach the component values).
Can I automate the co-simulation workflow?
Yes. ADS provides: automatic integration between the schematic and Momentum (the layout is automatically sent to Momentum, simulated, and the results imported back into the schematic). This enables: optimization loops where the circuit optimizer adjusts layout dimensions and calls Momentum automatically, and tuning sessions where the designer adjusts a dimension and sees the EM-simulated result in real time. Microwave Office (Cadence AWR) provides similar integration with its AXIEM EM solver. The key requirement: the layout must be parameterized (dimensions defined as variables) so the optimizer can vary them.
What about full 3D co-simulation?
For structures with significant 3D features (wire bonds, flip-chip bumps, package transitions, cavity-mounted MMICs): use HFSS or CST (3D solvers) instead of 2.5D planar solvers. The 3D solver captures: wire bond inductance and radiation, cavity resonance effects, and lid/cover coupling. The 3D simulation is slower (10-100× longer than 2.5D) but is essential for: packaged amplifier modules, MMIC designs with air bridges and via holes, and assembly-level simulations where the package affects the amplifier performance.