Semiconductor and Device Technology Advanced Semiconductor Topics Informational

What is the role of field plate technology in improving the breakdown voltage of GaN HEMTs?

The role of field plate technology in improving the breakdown voltage of GaN HEMTs is to reshape the electric field distribution at the drain edge of the gate, reducing the peak electric field and distributing it more uniformly across the gate-drain access region, which allows the device to withstand higher drain voltages before breakdown. Without a field plate: the electric field in a GaN HEMT peaks sharply at the drain-side edge of the gate metal, where the gate depletion region terminates. This peak can exceed the critical electric field of GaN (approximately 3.3 MV/cm) at drain voltages well below the material's theoretical limit, causing premature breakdown. With a field plate: a metallic plate (connected to either the gate or the source) extends over the gate-drain region on top of the passivation layer. This plate creates a second depletion region in the channel beneath it, which: adds a second electric field peak (under the field plate edge) that shares the voltage drop with the original gate-edge peak, reduces the peak electric field at the gate edge by 30-50%, distributes the total voltage drop over a longer channel region, and increases the breakdown voltage by 50-200% (depending on the field plate length and geometry). Common field plate configurations include: gate-connected field plate (the field plate is an extension of the gate metal, overhanging the gate-drain region by 0.5-2 um; this is the simplest implementation), source-connected field plate (the field plate is connected to the source potential via air bridges; provides better RF performance because the source field plate acts as an electrostatic shield between gate and drain, reducing C_gd and improving gain and stability), and multi-step field plates (two or three field plates of different lengths and heights, creating multiple electric field peaks for even more uniform field distribution).
Category: Semiconductor and Device Technology
Updated: April 2026
Product Tie-In: Transistors, MMICs

GaN HEMT Field Plate Technology

Field plate technology has been essential in enabling commercial GaN HEMT devices to operate at 50V and above. Without field plates, GaN devices would be limited to approximately 20-30V operation despite the material's high critical electric field.

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Common Questions

Frequently Asked Questions

How does the field plate affect RF performance?

Trade-off: the field plate improves breakdown voltage but affects RF performance. Gate field plate: increases C_gd (the plate-to-drain capacitance adds to the intrinsic C_gd), reducing f_max and gain. Quantification: a 1 um gate field plate may reduce f_max by 20-30%. Source field plate: reduces C_gd (the plate shields the gate from the drain), improving f_max and gain. A source field plate can actually improve RF performance while increasing breakdown. This is why source-connected field plates are preferred for high-frequency applications (> 6 GHz). For lower frequencies (< 3 GHz, e.g., cellular base stations): gate-connected field plates are acceptable because the frequency is well below f_max.

What breakdown voltage can GaN achieve?

GaN has a theoretical critical electric field of 3.3 MV/cm (10X higher than Si, 5X higher than GaAs). Theoretical breakdown voltage for a 1 um gate-drain spacing: > 300V. Practical GaN HEMT breakdown voltages: without field plate: 40-80V. With single field plate: 80-150V. With dual field plate: 150-250V. With multi-step field plates and optimized spacing: 400-650V (for power switching devices). Commercial RF GaN devices are rated for 65-120V drain voltage, with breakdown voltages of 120-250V. The gap between theoretical and practical is due to: surface states, buffer leakage, and practical field plate design limitations.

How is the field plate designed?

Field plate design is done using 2D device simulation tools (Silvaco ATLAS, Synopsys Sentaurus, COMSOL) that solve the coupled semiconductor and electromagnetic equations. The designer optimizes: field plate length (longer = better voltage distribution but higher capacitance), field plate height (distance from the channel, controlled by the passivation thickness; thicker passivation = lower capacitance but less effective field shaping), number of field plate steps (more steps = more uniform field distribution), and gate-drain spacing (longer L_gd accommodates more voltage but adds source resistance). The simulation maps the electric field along the channel and adjusts the field plate geometry until the peak electric field is below the reliability limit (typically < 2 MV/cm for long-term reliability).

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