Amplifier Selection and Design MMIC and Integrated Amplifiers Informational

How do I design the bias network for a MMIC amplifier to ensure stability across frequency?

The bias network must provide a low-impedance DC feed while presenting a high impedance (ideally open circuit) at RF frequencies. Design rules: (1) use a quarter-wave high-impedance transmission line or ferrite-loaded inductor as the bias choke, (2) decouple with multiple capacitor values in parallel (1 pF, 10 pF, 100 pF, 1 nF, 100 nF) to provide wideband bypassing, (3) add a series resistor (5-50 Ω) in the bias feed to suppress low-frequency oscillation, (4) place the first bypass capacitor within 1 mm of the MMIC supply pin. Common failure: a resonance between the bias choke inductance and bypass capacitance creates a high-Q resonance that can cause oscillation at a specific frequency.
Category: Amplifier Selection and Design
Updated: April 2026
Product Tie-In: MMICs, Gain Blocks, Evaluation Boards

Bias Network Design

The bias network is the most common source of MMIC instability. A poorly designed bias feed can create a feedback path at specific frequencies, turning a stable MMIC into an oscillator. The bias feed presents a complex impedance at RF that varies with frequency, potentially entering the unstable region of the stability circles at certain frequencies.

ParameterLNADriverPower Amplifier
Noise Figure0.3-2.0 dB3-8 dB5-15 dB (not specified)
Gain10-25 dB10-20 dB8-15 dB
P1dB-10 to +10 dBm+15 to +25 dBm+30 to +50 dBm
OIP3+5 to +25 dBm+25 to +40 dBm+40 to +55 dBm
DC Power10-100 mW0.5-5 W5-500 W
  • Performance verification: confirm specifications against the application requirements before finalizing the design
  • Environmental factors: temperature range, humidity, and vibration affect long-term reliability and parameter drift
  • Cost vs. performance: evaluate whether the application demands premium components or standard commercial grades
  • Interface compatibility: verify impedance, connector type, and mechanical form factor match the system architecture
Common Questions

Frequently Asked Questions

What choke inductance should I use?

For operating frequencies below 5 GHz: 10-30 nH chip inductor or 100-300 nH wirewound inductor. For 5-20 GHz: a quarter-wave high-impedance microstrip line (100 Ω, λ/4 at center frequency). Above 20 GHz: high-impedance transmission line or on-chip spiral inductor.

How do I find bias resonances?

Simulate the complete bias network impedance (choke + capacitors + PCB traces) versus frequency using a linear circuit simulator. Look for impedance nulls (near-short to ground at RF) at frequencies where the MMIC has gain. Add resistive damping at resonant frequencies.

Can the bias network affect gain flatness?

Yes. Bias network impedance variations modulate the transistor's operating point at different frequencies, causing gain ripple. A well-designed wideband bias network with flat impedance characteristics minimizes this effect. Electromagnetic simulation of the complete bias network including PCB traces reveals any resonances.

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