Transmission Lines

CPW Width

Q: How do I choose CPW width and gap for a 50 ohm line?

For a conductor-backed coplanar waveguide, the characteristic impedance depends on the ratio of the center strip width W to the spacing between the two ground planes (W + 2S, where S is the slot gap), not on the absolute dimensions. To target 50 ohms on alumina (relative permittivity about 9.8) with a thin metal, a common starting point is W = 100 micrometers with S = 60 micrometers. On a 0.127 mm RT/duroid 5880 substrate (permittivity 2.2) a 50 ohm grounded CPW might use W = 0.5 mm with S = 0.25 mm. The exact values come from conformal-mapping closed forms or an EM solver, then you scale W and S together to keep impedance fixed while trading off loss and the onset of higher-order modes.

Q: Does making the CPW center conductor wider always reduce loss?

Up to a point. Widening the center strip W while scaling the gap S to hold impedance constant spreads the current over more metal, lowering the conductor (ohmic) loss per unit length, which dominates below about 30 GHz on low-loss substrates. However, a wider total cross section (W + 2S) approaching half a guided wavelength lets unwanted parallel-plate, microstrip-like, and surface-wave modes propagate, and radiation loss rises. So loss falls with width only until those mode and radiation mechanisms take over. Most designers cap W + 2S well below lambda/4 at the highest operating frequency, which forces narrow dimensions at millimeter wave and pushes loss back up.

Q: How does CPW width affect the highest usable frequency?

The maximum single-mode frequency scales inversely with the overall transverse size of the line. As a rule of thumb the line stays single-mode while the total ground-to-ground span (W + 2S) is kept under roughly a tenth to a quarter of a guided wavelength. At 60 GHz on alumina the guided wavelength is near 1.2 mm, so W + 2S below about 150 micrometers is prudent, which typically means W around 40 to 60 micrometers. Larger widths invite the slot-line mode and substrate modes that distort the response, which is why CPW dimensions shrink and tolerance control tightens as frequency rises into the millimeter-wave bands.

/see-pee-dub-uhl-yoo width/

Within a coplanar waveguide, the lateral dimension of the center signal strip, conventionally labeled W. Paired with the slot gap S to each adjacent ground plane, it is the dominant geometric knob that fixes the line's characteristic impedance. Because impedance in CPW depends on the ratio W/(W + 2S) rather than the absolute size, designers can scale W and S together to hold 50 Ω while trading conductor loss against the onset of higher-order modes. A typical 50 Ω line on alumina uses W ≈ 100 μm with S ≈ 60 μm; on PTFE laminate the same impedance might need W ≈ 0.5 mm. As operating frequency climbs into the millimeter-wave bands, the total span W + 2S must shrink below a small fraction of a guided wavelength to suppress slot-line and substrate modes, so widths fall to tens of micrometers.

Category: Transmission Lines

Typical W (50 Ω, alumina): 80 to 120 μm

Impedance driver: W / (W + 2S) ratio

How Width and Gap Set CPW Behavior

Coplanar waveguide carries its signal on a single conductor in the same plane as two ground planes, separated by narrow slots. The center conductor width W and the slot gap S form a coupled pair: the field is concentrated in the slots and along the strip edges, so the two dimensions cannot be chosen independently. The crucial design insight is that the quasi-static characteristic impedance is a function of the geometric ratio k = W / (W + 2S), not of any single absolute length. This is why a CPW can be lithographically scaled, shrinking W and S in proportion, and still present the same 50 Ω to the circuit while the physical footprint changes.

That scaling freedom is what makes width selection an engineering trade rather than a single answer. A wider center strip carries the conduction current across more metal, which lowers ohmic loss per unit length, the loss mechanism that dominates below roughly 30 GHz on low-loss substrates. But a wider total cross section W + 2S brings the line closer to supporting unwanted modes. When the ground-to-ground span approaches a quarter of a guided wavelength, the parasitic slot-line mode, microstrip-like modes from a backside conductor, and surface waves begin to propagate, distorting the response and bleeding energy away as radiation. Practical designs therefore keep W + 2S well below lambda/4 at the top operating frequency.

Substrate permittivity enters through the effective dielectric constant, which for an ideal symmetric CPW on an infinitely thick substrate is simply the average of the substrate and air permittivities. Finite substrate thickness, a conductor backing (grounded CPW), and metal thickness all perturb this, so closed-form conformal-mapping expressions give a first cut and an electromagnetic solver fixes the final W and S. The conductor-backed variant is common in practice because it adds mechanical rigidity and a thermal path, at the cost of a competing microstrip mode that further constrains how wide the line can grow.

Governing Relations

Geometric ratio (impedance driver):
k = W / (W + 2S) k′ = √(1 − k²)

Characteristic impedance (conformal mapping):
Z₀ = (30π / √ε_eff) × K(k′) / K(k)

Effective permittivity (thick substrate, symmetric CPW):
ε_eff ≈ (ε_r + 1) / 2

Single-mode size guideline:
W + 2S < (λ_g / 4) with λ_g = c / (f × √ε_eff)

K() is the complete elliptic integral of the first kind; ε_r = substrate relative permittivity; λ_g = guided wavelength. Example: alumina (ε_r ≈ 9.8) gives ε_eff ≈ 5.4, so at 60 GHz λ_g ≈ 2.15 mm and W + 2S should stay under ≈ 0.5 mm.

Width and Gap Across Common Substrates

Substrate	ε_r	Center width W (50 Ω)	Slot gap S	Best frequency range	Notes
Alumina (0.254 mm)	9.8	~100 μm	~60 μm	DC to 40 GHz	Thin-film, tight tolerance
Fused quartz	3.8	~70 μm	~35 μm	DC to 110 GHz	Low loss at mmWave
GaAs (0.1 mm)	12.9	~50 μm	~25 μm	DC to 100+ GHz	MMIC on-chip CPW
RT/duroid 5880	2.2	~0.5 mm	~0.25 mm	DC to 20 GHz	PCB, lower precision
Silicon (high-res)	11.9	~55 μm	~28 μm	DC to 100+ GHz	Substrate loss a concern

Common Questions

Frequently Asked Questions

How do I choose CPW width and gap for a 50 ohm line?

Impedance follows the ratio k = W / (W + 2S), not the absolute dimensions, so you scale W and S together. On alumina (ε_r ≈ 9.8) a 50 Ω line often starts near W = 100 μm, S = 60 μm; on 0.127 mm RT/duroid 5880 (ε_r = 2.2) it might be W = 0.5 mm, S = 0.25 mm. Use the conformal-mapping Z₀ form for a first cut, then refine in an EM solver.

Does making the CPW center conductor wider always reduce loss?

Only up to a point. Widening W (with S scaled to hold impedance) spreads current over more metal and lowers ohmic loss, which dominates below about 30 GHz. But once the total span W + 2S nears λ/4, parallel-plate, microstrip-like, and surface-wave modes turn on and radiation loss climbs. Designers cap W + 2S well under λ/4 at the top frequency, so loss only falls with width within that window.

How does CPW width affect the highest usable frequency?

The single-mode ceiling scales inversely with the transverse size: keep W + 2S below roughly a tenth to a quarter of a guided wavelength. At 60 GHz on alumina λ_g ≈ 2.15 mm, so W + 2S under ~150 μm (W near 40 to 60 μm) is prudent. Larger widths invite the slot-line and substrate modes that distort the response, which is why CPW dimensions shrink at millimeter wave.

Related Terms

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Millimeter-Wave Transmission Lines

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