Power Electronics

Controlled Ramp

Q: How do you calculate the ramp rate needed to limit inrush into a bulk capacitor?

The charging current into a capacitor is I = C times dV/dt. To hold inrush below a target current, the ramp slope must satisfy dV/dt less than or equal to I_limit divided by C. For example, a 4700 uF bulk capacitor charged with a maximum inrush of 2 A requires dV/dt no faster than 2 / 0.0047 = 426 V/s. To reach a 28 V rail under that constraint the soft-start ramp must last at least 28 / 426 = 66 ms. Designers usually add margin and target a 50 to 100 ms ramp so that capacitor ESR variation and load capacitance tolerance do not push the peak current past the limit. The same relationship sets the gate-drive slew on a series soft-start MOSFET: a larger gate capacitor or a current-limited gate driver stretches the ramp and reduces both inrush and the audible turn-on transient.

Q: What is the difference between a soft-start ramp and slew-rate limiting?

A soft-start ramp is a one-shot event that runs only during turn-on, raising the output from zero to the regulation setpoint over a fixed interval (typically 1 to 100 ms) set by a soft-start capacitor or a digital timer. Slew-rate limiting is continuous: it caps how fast the output can change at any time, including during load steps, reference changes, or shutdown, by clamping the error-amplifier or DAC output. A converter can have both. The soft-start handles the initial inrush and monotonic startup into a pre-biased load, while the slew limiter governs dynamic transients afterward. In RF bias supplies the slew limit also bounds the spectral content of the turn-on edge: a 1 V/us ramp produces far less broadband transient energy than an abrupt step, which matters when the drain rail feeds a sensitive low-noise amplifier.

Q: Why does an RF power amplifier drain rail need a controlled ramp instead of a hard switch?

Switching a GaN or LDMOS drain rail abruptly creates three problems. First, the large output decoupling capacitance draws a heavy inrush spike that can trip protection or sag the upstream rail. Second, a fast dV/dt couples through the drain-to-gate (Miller) capacitance and can momentarily disturb or stress the gate, and for depletion-mode GaN the gate must already be at its pinch-off voltage before drain power appears or the device conducts uncontrolled. Third, the step excites broadband transient energy that appears as a click or spur at the RF output and can desensitize nearby receivers. A controlled drain ramp of roughly 0.5 to 5 V/us, sequenced after the gate bias is established, charges the decoupling network gently, keeps the device in its safe operating area, and produces a clean, monotonic power-on with no overshoot.

/kuhn-TROHLD ramp/

Shaping the rate of rise or fall of a voltage or current during power-supply turn-on and turn-off defines a controlled ramp. By holding dV/dt and dI/dt within bounds set by a soft-start capacitor or current-limited gate driver, the technique suppresses the inrush current that floods bulk decoupling capacitance, keeps semiconductor devices inside their safe operating area, and reduces the broadband transient energy radiated when a rail switches. In RF and microwave hardware a controlled drain or bias ramp is also sequenced relative to gate bias, so depletion-mode GaN devices never see drain power before pinch-off is established. Typical ramps run from 1 ms for low-power point-of-load rails to 100 ms for high-energy 28 V and 48 V bus capacitors.

Category: Power Electronics

Typical Ramp: 1 to 100 ms

Drain Slew: 0.5 to 5 V/µs

Shaping Turn-On and Turn-Off Transients

A controlled ramp replaces an abrupt step in voltage or current with a defined slope so the energy that moves into capacitive and inductive elements is metered rather than dumped. The governing physics is straightforward: the current into a capacitor is proportional to dV/dt, and the voltage across an inductor is proportional to dI/dt. An unmanaged turn-on charges every bulk and decoupling capacitor through whatever series resistance exists, producing an inrush spike that can reach tens of amps for the brief duration set by the path RC. By stretching the rise over milliseconds, the same charge is delivered at a fraction of the peak current, protecting fuses, hot-swap controllers, and the rectifier or upstream bus from sag and stress.

In a switching regulator the ramp is normally implemented with a soft-start pin: an external capacitor is charged by a small internal current source, and the rising voltage on that pin clamps the feedback reference so the output tracks it from zero to the regulation point. A 10 nF soft-start capacitor charged by a 5 µA source rising to a 0.8 V reference gives a ramp time of roughly 1.6 ms. Linear and hot-swap designs instead control the gate of a series pass MOSFET, where the gate-source capacitance and a current-limited driver set dV/dt directly. Digital power controllers replace the capacitor with a programmable timer and can shape multi-segment ramps, pause for power-good handshakes, and coordinate several rails.

For RF subsystems the ramp does double duty. Besides limiting inrush, the slope bounds the spectral content of the switching edge. A drain rail that steps in nanoseconds injects broadband transient energy that appears as a click or spur at the antenna and can desensitize a co-located receiver. A 1 V/µs ramp on the same rail spreads that energy over a far lower bandwidth. The ramp is also the mechanism that enforces bias sequencing: the gate of a depletion-mode GaN device must reach its pinch-off voltage before the drain ramp begins, or the channel conducts uncontrolled current at turn-on.

Ramp-Rate and Inrush Equations

Capacitor charging (inrush) current:
I_inrush = C × dV/dt → dV/dt ≤ I_limit / C

Minimum soft-start ramp time:
t_ramp ≥ V_out × C / I_limit

Soft-start capacitor ramp:
t_ramp ≈ (C_SS × V_ref) / I_SS

Inductor di/dt clamp (rail with series L):
V_L = L × dI/dt

Where C = bulk capacitance, V_out = target rail, I_limit = allowed peak current, C_SS = soft-start capacitor, V_ref = feedback reference, I_SS = soft-start charge current, L = series inductance. Example: C = 4700 µF, I_limit = 2 A → dV/dt ≤ 426 V/s, so a 28 V rail needs t_ramp ≥ 66 ms.

Ramp Methods and Typical Parameters

Method	Set By	Typical Ramp Time	Slew Range	Best Application
Soft-start capacitor	C_SS & internal I source	1 to 20 ms	0.04 to 0.8 V/ms	POL and module regulators
Gate-controlled pass FET	C_gs & gate drive current	5 to 50 ms	0.5 to 5 V/µs	Hot-swap, drain rails
Digital ramp timer	Programmable register	0.5 to 200 ms	Multi-segment	Sequenced multi-rail systems
NTC inrush limiter	Thermistor R(T)	Self-timed, <1 s	Passive	Off-line front ends
Analog slew clamp	Error-amp output limit	Continuous	0.1 to 10 V/µs	Load-step transient control

Common Questions

Frequently Asked Questions

How do you calculate the ramp rate needed to limit inrush into a bulk capacitor?

Charging current is I = C × dV/dt, so the slope must satisfy dV/dt ≤ I_limit / C. A 4700 µF bulk capacitor held to 2 A of inrush needs dV/dt no faster than 2 / 0.0047 = 426 V/s, so reaching a 28 V rail takes at least 28 / 426 = 66 ms. Designers add margin and target a 50 to 100 ms ramp so ESR and load-capacitance tolerance do not push the peak past the limit.

What is the difference between a soft-start ramp and slew-rate limiting?

A soft-start ramp is a one-shot startup event that raises the output from zero to the setpoint over a fixed 1 to 100 ms interval set by a capacitor or timer. Slew-rate limiting is continuous, capping how fast the output can change during load steps, reference changes, or shutdown. Many converters use both: soft-start handles initial inrush, while the slew clamp governs dynamic transients and bounds the spectral content of each edge.

Why does an RF power amplifier drain rail need a controlled ramp instead of a hard switch?

A hard switch draws a heavy inrush spike into the output decoupling, couples a fast dV/dt through the drain-to-gate (Miller) capacitance into the gate, and radiates broadband transient energy that can spur the RF output. For depletion-mode GaN the gate must reach pinch-off before drain power appears. A sequenced drain ramp of roughly 0.5 to 5 V/µs charges the network gently, keeps the device in its safe operating area, and produces a clean, monotonic power-on.

Related Terms

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