Compact Model
Understanding the Compact Model
A compact model is the bridge between semiconductor device physics and practical circuit design. When an engineer simulates an RF power amplifier, low-noise amplifier, or mixer, the simulator does not solve the drift-diffusion or transport equations for each transistor. Instead it calls a compact model: a small set of analytic equations that returns the current and charge at each device terminal for a given set of node voltages. The word compact refers to the computationally efficient form of these equations relative to the full physical problem, not to the physical size of the device.
Why Compact Models Exist
Solving the full semiconductor equations on a spatial mesh, the approach used by technology computer-aided design (TCAD), can take seconds to minutes for a single device. A modern RF integrated circuit may contain thousands of transistors, and a harmonic-balance or transient simulation evaluates each device many thousands of times. That workload is only tractable if every device evaluation costs microseconds. A compact model achieves this by reducing the physics to closed-form expressions for drain or collector current, gate and junction charges, and noise sources.
What a Compact Model Must Reproduce
An RF compact model is more demanding than a digital or low-frequency analog one. It must simultaneously match the DC current-voltage characteristics, the small-signal behavior captured by S-parameters across frequency and bias, the large-signal compression and output power, the harmonic and intermodulation distortion, and the noise figure. These quantities are not independent: the same charge equations that set the cutoff frequency also govern nonlinear distortion, so a model tuned only to DC current will produce wrong linearity predictions.
Model Extraction and Verilog-A
Turning measured device data into a usable compact model is called parameter extraction. An engineer measures families of DC curves, multi-bias S-parameters, and often load-pull and noise data, then fits the model parameters so the equations reproduce the measurements across the full operating space. Modern compact models are written in the Verilog-A hardware description language, which lets a foundry distribute one portable model that any compliant simulator can compile, rather than hard-coding equations into each tool.
Key Equations
ID = (1/2) · μCox · (W/L) · (VGS − Vth)2 · (1 + λVDS)
where ID is drain current (A), μ is channel carrier mobility (cm2/V·s), Cox is gate-oxide capacitance per unit area (F/cm2), W/L is the channel width-to-length ratio (dimensionless), VGS is gate-to-source voltage (V), Vth is threshold voltage (V), VDS is drain-to-source voltage (V), and λ is the channel-length-modulation parameter (1/V). Valid in saturation, where VDS ≥ VGS − Vth > 0.
Unity-current-gain cutoff frequency:
fT = gm / (2π · (Cgs + Cgd))
where gm is transconductance (S), and Cgs and Cgd are the gate-to-source and gate-to-drain capacitances (F). Because gm and the capacitances come from the same model equations, an RF compact model is correct only when its current and charge formulations agree at the operating bias.
Common RF Compact Models
| Model | Device Family | Typical Use |
|---|---|---|
| BSIM-CMG / BSIM-BULK | FinFET and bulk Si MOSFET | CMOS RF front-ends, mixed-signal |
| PSP | Bulk Si MOSFET | Surface-potential RF and analog CMOS |
| HICUM / VBIC | Bipolar and SiGe HBT | mm-wave SiGe LNAs and PAs |
| ASM-HEMT | GaN HEMT | High-power RF and microwave PAs |
| MVSG | GaN HEMT | Surface-potential GaN large-signal design |
Frequently Asked Questions
What is a compact model?
A compact model is a closed-form set of equations that represents a semiconductor device inside a circuit simulator. It computes the terminal currents, stored charges, and noise of a transistor or diode as functions of applied bias, frequency, and temperature, so a designer can simulate an amplifier or mixer without solving the full device physics for every transistor.
How does a compact model differ from a TCAD or behavioral model?
A TCAD model solves the semiconductor transport equations on a spatial mesh and is far too slow for circuit simulation. A compact model collapses that physics into analytic equations that evaluate in microseconds. A behavioral model, such as an X-parameter or table-based file, captures measured response without internal physics, so a compact model sits between them with both speed and physical scaling.
Which compact models are common for RF devices?
For silicon MOSFETs the BSIM family and PSP are standard, BSIM-CMG covers FinFETs, HICUM and VBIC cover bipolar and SiGe HBTs, and ASM-HEMT and MVSG cover GaN HEMTs. Most are written in Verilog-A and distributed inside the foundry process design kit so they run consistently across simulators.