What is the timing and frequency synchronization requirement for an SDR-based OFDM receiver?

The timing and frequency synchronization requirements for an SDR-based OFDM receiver are stringent because OFDM is highly sensitive to synchronization errors. Timing synchronization requires: symbol timing accuracy (the FFT window must be placed within the cyclic prefix (CP) interval to avoid inter-symbol interference (ISI); the timing error must be less than the CP duration minus the channel delay spread; for 802.11a with CP = 800 ns and 100 ns delay spread: timing accuracy must be < 700 ns; for 5G NR with normal CP = 4.69 us: timing accuracy must be < 4 us minus the channel delay spread), and sample clock synchronization (the receiver's ADC sample clock must match the transmitter's DAC clock within approximately 1 ppm for acceptable performance; a 1 ppm error at 20 MHz sample rate causes a 20 Hz drift per sample, which creates a linearly increasing phase error across subcarriers and inter-carrier interference). Frequency synchronization requires: carrier frequency offset (CFO) correction to within a small fraction of the subcarrier spacing (for an acceptable ICI level of < -30 dB relative to the signal: the residual CFO must be < 1-2% of the subcarrier spacing; for 802.11a with 312.5 kHz subcarrier spacing: the residual CFO must be < 3-6 kHz; for 5G NR with 30 kHz subcarrier spacing: the residual CFO must be < 300-600 Hz), and this requirement is challenging because typical SDR oscillators have frequency errors of 1-10 ppm (at 5 GHz carrier: 5-50 kHz error), which is much larger than the allowed residual CFO.