Passive Components and Devices Attenuators, Loads, and Other Passives Informational

What is the frequency response of a DC block capacitor and how do I select the right value?

Q: Can I eliminate the DC block by using a transformer?

Yes. A transformer (or balun) inherently blocks DC (no galvanic connection between primary and secondary windings). This eliminates the capacitor entirely. Advantages: no SRF limitation (the transformer bandwidth is determined by the winding design, not by LC resonance). DC blocking and impedance transformation in one component. Disadvantages: transformers are larger and more expensive than capacitors. At frequencies above 6 GHz: transformers have significant loss and are rarely used. For < 6 GHz: a wideband transformer (such as a Mini-Circuits TC-series) is an excellent broadband DC block + impedance matching solution.

A DC block capacitor passes RF signals while blocking DC bias voltages. Its frequency response is determined by the capacitance value, self-resonant frequency (SRF), and package parasitics: (1) Low-frequency cutoff: below a certain frequency, the capacitor impedance is too high to pass the signal. The -3 dB cutoff: f_low = 1/(2×pi×C×2×Z_0), where Z_0 is the system impedance (50 ohms). For C = 100 pF: f_low = 1/(2×pi×100e-12×100) = 15.9 MHz. Below 15.9 MHz: the insertion loss exceeds 3 dB (signal is attenuated). For C = 10 nF: f_low = 159 kHz (much lower cutoff, passes lower frequencies). For C = 100 nF: f_low = 15.9 kHz. Rule: larger capacitance = lower cutoff frequency. (2) Self-resonant frequency (SRF): the frequency at which the capacitor series inductance (ESL) resonates with the capacitance: SRF = 1/(2×pi×sqrt(C×ESL)). At the SRF: the capacitor impedance is minimum (essentially just the ESR). Below SRF: the component behaves as a capacitor (impedance decreases with frequency). Above SRF: the component behaves as an inductor (impedance increases with frequency). For a 0402 package, 100 pF: ESL ≈ 0.4 nH. SRF = 1/(2×pi×sqrt(100e-12×0.4e-9)) = 796 MHz. The cap is useful as a DC block from 16 MHz to about 800 MHz. Above 800 MHz: insertion loss increases. For a 0402, 10 pF: ESL ≈ 0.4 nH. SRF = 2.52 GHz. Useful from 159 MHz to about 2.5 GHz. For a 0201, 1 pF: ESL ≈ 0.2 nH. SRF = 11.3 GHz. Useful from 1.59 GHz to about 11 GHz. (3) Insertion loss: at the SRF and slightly below: the insertion loss is minimum (0.05-0.2 dB). Well below SRF: insertion loss increases (high capacitive reactance). Above SRF: insertion loss increases (inductive impedance). For broadband DC blocking (e.g., 100 MHz to 6 GHz): use multiple capacitors in parallel (a large cap for low-frequency coverage + a small cap for high-frequency coverage).

Category: Passive Components and Devices

Updated: April 2026

Product Tie-In: Attenuators, Loads, DC Blocks, Bias Tees

DC Block Selection

DC block capacitors are used throughout RF systems: between amplifier stages, at the input/output of test equipment, and at any point where DC bias must be isolated between circuit blocks.

Parameter	Option A	Option B	Option C
Performance	High	Medium	Low
Cost	High	Low	Medium
Complexity	High	Low	Medium
Bandwidth	Narrow	Wide	Moderate
Typical Use	Lab/military	Consumer	Industrial

Technical Considerations

(1) Multilayer ceramic (MLCC): the most common type for RF DC blocks. Available in COG/NP0 (stable, low loss) and X7R (higher capacitance but temperature-dependent). For RF: always use COG/NP0. The dielectric constant does not change with voltage, temperature, or time. Capacitance stability: ±30 ppm/°C (essentially zero drift). Loss tangent (dissipation factor): < 0.001 at 1 GHz (very low loss). Available: 0.1 pF to 10 nF in 0201 to 0805 packages. (2) Single-layer ceramic (SLC): a single layer of ceramic with electrodes on top and bottom. Lower capacitance (0.01-10 pF) but very high SRF (> 20 GHz for 0.1 pF). Used for mmWave DC blocks (> 10 GHz). Available from vendors Johanson, Presidio, ATC. (3) Thin-film capacitors: fabricated using semiconductor thin-film processes. Very precise capacitance (±1%), very low loss, and high SRF. Used in MMIC designs (on-chip DC blocks). (4) Connectorized DC blocks: a DC block integrated into a coaxial connector housing (SMA, 2.92 mm, etc.). Contains an internal capacitor with matched transitions. Frequency range: 10 MHz to 40+ GHz (broadband designs use multiple internal capacitors). Insertion loss: 0.2-0.5 dB across the band. Power handling: 0.5-5 W. Used in: test equipment, measurement setups, and system integration.

Performance Analysis

(1) Determine the frequency range: what is the lowest and highest RF frequency that must pass? If f_low = 100 MHz and f_high = 6 GHz: need SRF > 6 GHz → use 1-5 pF (SRF = 4-11 GHz). But the low-frequency cutoff is: f_cutoff = 1/(2×pi×5e-12×100) = 318 MHz. This is above 100 MHz: the 5 pF cap does not cover the low end. Solution: use two caps in parallel: 100 pF (f_cutoff = 16 MHz, SRF = 800 MHz) + 1 pF (f_cutoff = 1.6 GHz, SRF = 11 GHz). The 100 pF covers 16 MHz to 800 MHz. The 1 pF covers 1.6 GHz to 11 GHz. Overlap from 800 MHz to 1.6 GHz is handled by the combined parallel impedance. (2) Determine the voltage rating: the DC block must withstand the DC voltage difference between the two circuits it separates. For a PA output at V_DD = 12 V: the DC block must be rated > 12 V. Typical ratings: 0201/0402 COG: 16-50 V. 0603/0805 COG: 25-200 V. For high-voltage applications (tube amplifiers, HV bias): use specialized high-voltage capacitors or connectorized DC blocks. (3) Power handling: the RF current through the cap causes heating (I²×ESR). For a 50-ohm system at +30 dBm (1 W): I_rms = sqrt(1/50) = 141 mA. Power dissipated in the cap: P = I² × ESR. For ESR = 0.1 ohm: P = 0.002 W (negligible). At +40 dBm (10 W): P = 0.2 W (significant for small caps; use a larger package).

Performance verification: confirm specifications against the application requirements before finalizing the design
Environmental factors: temperature range, humidity, and vibration affect long-term reliability and parameter drift
Cost vs. performance: evaluate whether the application demands premium components or standard commercial grades
Interface compatibility: verify impedance, connector type, and mechanical form factor match the system architecture
Margin allocation: include sufficient design margin to account for manufacturing tolerances and aging effects

Design Guidelines

When evaluating the frequency response of a dc block capacitor and how do i select the right value?, engineers must account for the specific requirements of their target application. The optimal choice depends on the frequency range, power level, environmental conditions, and cost constraints of the overall system design.

Common Questions

Frequently Asked Questions

What happens if I use X7R instead of COG for a DC block?

X7R ceramic has: ±15% capacitance change over -55 to +125°C. Capacitance decreases up to 80% with applied DC voltage (DC bias derating). Higher loss tangent (0.01-0.03 vs 0.001 for COG). For a DC block: the X7R capacitance drops under DC bias, shifting the low-frequency cutoff higher. At 50% derating: the effective capacitance is half the nominal, doubling f_cutoff. The higher loss increases insertion loss (especially at and around the SRF). For non-critical applications (blocking DC on a bias line, not in the signal path): X7R is acceptable and provides higher capacitance per volume. For signal path DC blocks: always use COG/NP0.

How do I DC-block at mmWave frequencies?

At 28+ GHz: standard MLCC chips are above their SRF and behave as inductors (cannot block DC). Options: (1) Single-layer ceramic (SLC) caps: 0.1-1 pF with SRF > 30 GHz. Available from ATC, Johanson, Passive Plus. (2) MIM capacitors: fabricated as part of the MMIC process. SRF > 100 GHz for < 1 pF. (3) Coupled-line DC blocks: a section of coupled microstrip lines that passes RF through electromagnetic coupling while blocking DC. The coupling provides a natural DC block with no discrete capacitor. Bandwidth: 20-40% fractional bandwidth. Used in many MMIC designs. (4) Microstrip gap: a physical gap in the microstrip trace. The fringing capacitance across the gap passes RF. Very simple but narrow bandwidth and high loss. Suitable for narrowband designs only.

Can I eliminate the DC block by using a transformer?

Yes. A transformer (or balun) inherently blocks DC (no galvanic connection between primary and secondary windings). This eliminates the capacitor entirely. Advantages: no SRF limitation (the transformer bandwidth is determined by the winding design, not by LC resonance). DC blocking and impedance transformation in one component. Disadvantages: transformers are larger and more expensive than capacitors. At frequencies above 6 GHz: transformers have significant loss and are rarely used. For < 6 GHz: a wideband transformer (such as a Mini-Circuits TC-series) is an excellent broadband DC block + impedance matching solution.

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