Millimeter Wave Specific Challenges mmWave Design Challenges Informational

What is the effect of PCB via inductance on millimeter wave circuit performance?

Q: Can I use standard through-hole vias at 28 GHz?

Only with great care: (1) For signal vias: a standard through-hole via in a 1.6 mm board (L ≈ 0.7 nH) is problematic at 28 GHz (Z = 123 ohms). The via must be backdrilled to remove the stub, and the antipad must be optimized by EM simulation. Even with optimization: the insertion loss per via transition is 0.3-0.8 dB at 28 GHz (significant in a system with multiple transitions). (2) For ground and power vias: through-hole ground vias are acceptable (the low impedance of the via is actually beneficial for grounding; you want the ground connection to be as low-impedance as possible). Multiple parallel ground vias: even better (lower total inductance). (3) Best practice at 28 GHz: use blind microvias for all signal transitions. Use through-hole vias only for ground stitching and power connections. Backdrill any through-hole vias that must carry signals.

Q: How many vias in parallel to reduce inductance?

The inductance of N parallel vias: L_total ≈ L_single / N × (1 + (N-1)×M/L_single), where M is the mutual inductance between vias. For vias spaced > 3× their length apart: M is small and L_total ≈ L_single / N. For closely spaced vias (< 1× length): M ≈ 0.3-0.5 × L_single. L_total ≈ L_single / N × (1 + (N-1) × 0.4) = L_single × (0.4 + 0.6/N). For N = 2: L_total ≈ 0.7 × L_single (30% reduction, not 50%). For N = 4: L_total ≈ 0.55 × L_single. For N = 8: L_total ≈ 0.48 × L_single. Diminishing returns above 4-6 parallel vias due to mutual inductance. For ground vias: use 4-6 parallel vias for the best practical inductance reduction.

Q: What about coaxial via structures?

A coaxial via: a signal via surrounded by a ring of ground vias, forming a coaxial transmission line through the PCB stack-up. The ground via ring creates a controlled-impedance environment around the signal via. Design: signal via: centered. Ground vias: 6-8 vias in a ring at a radius that provides the desired impedance: Z = (60/sqrt(epsilon_r)) × ln(R_ring/R_signal). For 50 ohms on FR-4: R_ring / R_signal ≈ 5.5. If the signal via pad = 0.4 mm diameter (R = 0.2 mm): R_ring = 1.1 mm (ground vias at 1.1 mm radius = 2.2 mm diameter ring). The coaxial via provides: 50-ohm impedance through the transition (matched), excellent shielding (the ground ring isolates the signal via from adjacent circuits), and predictable, simulatable performance. Used in: mmWave PCB designs, high-speed backplanes, and precision RF interconnects. The trade-off: the coaxial via structure consumes significant PCB area (2.2 mm diameter per signal transition).

PCB via inductance becomes a dominant parasitic at millimeter-wave frequencies, creating impedance discontinuities that cause reflections, reduce gain, and limit bandwidth. Via inductance: a standard through-hole via (0.2-0.3 mm drill, 1.6 mm PCB) has L_via ≈ 0.5-1.0 nH. At 28 GHz: Z = 2×pi×28e9×0.7e-9 = 123 ohms. This 123 ohms in series with a 50-ohm line creates massive mismatch (VSWR > 3:1, return loss < 6 dB). At 77 GHz: Z = 339 ohms (essentially an open circuit). Even short vias have significant inductance: a 0.2 mm via (blind via, connecting adjacent layers) has L ≈ 0.05-0.15 nH. At 28 GHz: Z = 9-26 ohms. At 77 GHz: Z = 24-73 ohms. Still significant compared to 50 ohms. Effects on mmWave circuits: (1) Matching network detuning: the via inductance adds to the matching network elements, shifting the match frequency. For a quarter-wave transformer at 28 GHz: a 0.1 nH via adds 18 ohms in series, detuning the transformer and increasing the return loss. (2) Interconnect loss: the via mismatch reflects power back and forth, creating standing waves in the transmission line. The multiple reflections increase the effective insertion loss beyond the simple mismatch loss. (3) Resonances: the via inductance combined with pad/antipad capacitance forms an LC resonator. Near the via SRF: the insertion loss peaks. The SRF of a typical through-hole via: f_SRF = 1/(2×pi×sqrt(L_via × C_pad)) ≈ 20-50 GHz (depending on geometry). If the SRF falls within the operating band: the circuit performance is severely degraded. Mitigation: (a) Use blind/buried vias (shorter = lower L). (b) Use multiple parallel vias (L_total = L_single/N approximately). (c) Design the via with a controlled antipad size to manage the capacitance and match the via impedance closer to 50 ohms. (d) Avoid vias in the signal path entirely: use edge-launch connectors and horizontal transitions wherever possible.

Category: Millimeter Wave Specific Challenges

Updated: April 2026

Product Tie-In: mmWave Components, Substrates, Packaging

Via Inductance at mmWave

At millimeter-wave frequencies, the via is not just a simple connection between layers; it is a complex electromagnetic structure that must be designed as carefully as any other circuit element.

Via Electromagnetic Model

(1) The via is modeled as a short section of coaxial transmission line: the via barrel is the center conductor, and the antipad (cleared area in the ground plane) forms the outer conductor. The characteristic impedance of this mini-coax: Z_via = (60/sqrt(epsilon_r)) × ln(D_antipad/D_via). For D_antipad = 0.6 mm, D_via = 0.3 mm (pad), epsilon_r = 4.2 (FR-4): Z_via = (60/2.05) × ln(2) = 29.3 × 0.693 = 20.3 ohms. This is much lower than the 50-ohm trace, creating a capacitive discontinuity (the via looks like a shunt capacitor). (2) The via also has series inductance from the barrel: L_via ≈ (mu_0/(2×pi)) × h × (ln(D_antipad/D_barrel) + 0.25). For h = 0.2 mm (2-layer transition), D_antipad = 0.6 mm, D_barrel = 0.2 mm: L = 0.2e-9 × 0.2 × (ln(3) + 0.25) = 0.04 × 1.35 = 0.054 nH. At 28 GHz: Z_L = 9.5 ohms. At 77 GHz: Z_L = 26 ohms. (3) The pad capacitance: C_pad = epsilon_0 × epsilon_r × pi × (D_pad² - D_drill²) / (4 × h). For D_pad = 0.4 mm, D_drill = 0.2 mm, h = 0.1 mm (prepreg thickness above one ground plane), epsilon_r = 4.2: C = 8.85e-12 × 4.2 × pi × (0.16e-6 - 0.04e-6) / (4 × 0.1e-3) = 8.85e-12 × 4.2 × 3.14 × 0.12e-6 / 4e-4 = 0.035 pF. At 28 GHz: Z_C = 1/(2×pi×28e9×0.035e-12) = 163 ohms. The pad capacitance effect is moderate at 28 GHz but significant at 77 GHz (Z_C = 59 ohms). (4) SRF: f_SRF = 1/(2×pi×sqrt(0.054e-9 × 0.035e-12)) = 116 GHz. Well above the operating frequency; the via is not resonant. But for longer vias (through-hole, L = 0.7 nH) with larger pads (C = 0.1 pF): f_SRF = 19 GHz. This is within the 5G band.

Design Techniques

(1) Via diameter and antipad optimization: increase the antipad diameter: reduces the via capacitance (Z_via increases). The via looks less capacitive and more like 50 ohms. Optimal antipad for 50-ohm via: D_antipad ≈ D_via × e^(50×sqrt(epsilon_r)/60) = 0.3 × e^(50×2.05/60) = 0.3 × e^(1.71) = 0.3 × 5.53 = 1.66 mm. This is a large antipad (1.66 mm diameter clearance in the ground plane). The large clearance disrupts the ground plane, potentially causing other problems. Compromise: use a 0.8-1.0 mm antipad (Z_via = 30-40 ohms) and accept some mismatch. (2) Compensating structures: add a small pad or stub on the via exit to provide inductance that compensates the via capacitance, creating a matched transition. The compensation pad dimensions are determined by 3D EM simulation. This is standard practice in mmWave PCB design. (3) Avoid through-hole vias for mmWave signals: use blind or buried microvias that only transition between adjacent layers. The short via (0.05-0.1 mm) has minimal inductance (< 0.05 nH) and negligible effect even at 77 GHz.

Via Impedance Parameters

Z_via = (60/√ε_r)·ln(D_antipad/D_via)
L_via ≈ μ₀h/(2π)·(ln(D_ap/D_barrel)+0.25)
At 28GHz: 0.7nH → Z=123Ω (unacceptable)
Microvia 0.1mm: L≈0.05nH → Z=9Ω @28GHz
SRF_via = 1/(2π√(L·C_pad))

Common Questions

Frequently Asked Questions

Can I use standard through-hole vias at 28 GHz?

Only with great care: (1) For signal vias: a standard through-hole via in a 1.6 mm board (L ≈ 0.7 nH) is problematic at 28 GHz (Z = 123 ohms). The via must be backdrilled to remove the stub, and the antipad must be optimized by EM simulation. Even with optimization: the insertion loss per via transition is 0.3-0.8 dB at 28 GHz (significant in a system with multiple transitions). (2) For ground and power vias: through-hole ground vias are acceptable (the low impedance of the via is actually beneficial for grounding; you want the ground connection to be as low-impedance as possible). Multiple parallel ground vias: even better (lower total inductance). (3) Best practice at 28 GHz: use blind microvias for all signal transitions. Use through-hole vias only for ground stitching and power connections. Backdrill any through-hole vias that must carry signals.

How many vias in parallel to reduce inductance?

The inductance of N parallel vias: L_total ≈ L_single / N × (1 + (N-1)×M/L_single), where M is the mutual inductance between vias. For vias spaced > 3× their length apart: M is small and L_total ≈ L_single / N. For closely spaced vias (< 1× length): M ≈ 0.3-0.5 × L_single. L_total ≈ L_single / N × (1 + (N-1) × 0.4) = L_single × (0.4 + 0.6/N). For N = 2: L_total ≈ 0.7 × L_single (30% reduction, not 50%). For N = 4: L_total ≈ 0.55 × L_single. For N = 8: L_total ≈ 0.48 × L_single. Diminishing returns above 4-6 parallel vias due to mutual inductance. For ground vias: use 4-6 parallel vias for the best practical inductance reduction.

What about coaxial via structures?

A coaxial via: a signal via surrounded by a ring of ground vias, forming a coaxial transmission line through the PCB stack-up. The ground via ring creates a controlled-impedance environment around the signal via. Design: signal via: centered. Ground vias: 6-8 vias in a ring at a radius that provides the desired impedance: Z = (60/sqrt(epsilon_r)) × ln(R_ring/R_signal). For 50 ohms on FR-4: R_ring / R_signal ≈ 5.5. If the signal via pad = 0.4 mm diameter (R = 0.2 mm): R_ring = 1.1 mm (ground vias at 1.1 mm radius = 2.2 mm diameter ring). The coaxial via provides: 50-ohm impedance through the transition (matched), excellent shielding (the ground ring isolates the signal via from adjacent circuits), and predictable, simulatable performance. Used in: mmWave PCB designs, high-speed backplanes, and precision RF interconnects. The trade-off: the coaxial via structure consumes significant PCB area (2.2 mm diameter per signal transition).

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