What is frequency multiplexing for qubit readout and how many qubits can share a single readout line?
Multiplexed Qubit Readout Architecture
Frequency multiplexing is the primary cabling reduction strategy for scaling quantum computers. Every output line requires expensive components (multiple circulators, a quantum-limited amplifier, a HEMT LNA, and cryogenic-to-room-temperature cabling), so reducing output line count proportionally reduces system cost and complexity.
Technical Considerations
Designing the readout frequency plan for N multiplexed qubits: (1) Select the readout band: typically 6.0-7.5 GHz, detuned 1-2 GHz above the highest qubit frequency. (2) Calculate minimum spacing: delta_f > 5 × kappa (the resonator linewidth) to ensure <0.5% crosstalk between adjacent channels. For kappa/2pi = 3 MHz: delta_f > 15 MHz. In practice, 100-200 MHz spacing is used for additional margin. (3) Assign frequencies: space N resonators uniformly across the band. For N = 8 in a 6.0-7.4 GHz band: spacing = 200 MHz, frequencies at 6.0, 6.2, 6.4, 6.6, 6.8, 7.0, 7.2, 7.4 GHz. (4) Verify no collisions with qubit transition frequencies (f_01), qubit second excited state frequencies (f_12 = f_01 + alpha), or combination frequencies (f_01_A + f_01_B for coupled qubit pairs). (5) Check that the dispersive shift chi varies acceptably across the band (chi depends on detuning Delta = f_r - f_q, which varies for each qubit-resonator pair).
Performance Analysis
Room-temperature electronics must generate N probe tones and demodulate N return signals simultaneously. Generation: an AWG creates a multi-tone waveform containing all N readout frequencies (or uses N independent DDS channels summed in hardware). Each tone has individually calibrated amplitude and phase. Demodulation: the return signal is digitized by a wideband ADC (2-4 GSa/s, 12-14 bit) and processed by an FPGA that performs N parallel digital downconversion, matched filtering, and state discrimination operations. The FPGA outputs N binary measurement results within microseconds of the readout pulse ending, fast enough for real-time feedback in quantum error correction. Commercial platforms supporting multiplexed readout FPGA processing: Zurich Instruments SHFQA (8 channels per unit, expandable), Quantum Machines OPX+ (configurable channel count), Keysight M5302A.
- Performance verification: confirm specifications against the application requirements before finalizing the design
- Environmental factors: temperature range, humidity, and vibration affect long-term reliability and parameter drift
- Cost vs. performance: evaluate whether the application demands premium components or standard commercial grades
- Interface compatibility: verify impedance, connector type, and mechanical form factor match the system architecture
- Margin allocation: include sufficient design margin to account for manufacturing tolerances and aging effects
Design Guidelines
For future quantum computers: 1,000 qubits with 16 qubits per line = 63 output lines, each requiring 1 TWPA + 3 circulators + 1 HEMT + 1 coax output cable. Total components: 63 TWPAs, 189 circulators, 63 HEMTs. Compare to non-multiplexed: 1000 of each. At $5,000 per TWPA and $3,000 per circulator chain: multiplexed cost ~$900K vs non-multiplexed ~$8M for output-chain components alone. For 1,000,000 qubits (fault-tolerant quantum computing): 16-qubit multiplexing reduces output lines to 62,500. Even with multiplexing, this many lines in a cryostat is impractical, driving research into cryo-CMOS readout electronics (integrating ADCs at 4K) and further multiplexing to 100+ qubits per line.
Frequently Asked Questions
What is the maximum multiplexing ratio achievable?
Current state: 7-16 qubits per line in production systems. Research demonstrations: 50+ resonators in a single readout band using tightly spaced (10-50 MHz) resonators with high internal Q. The fundamental limit is set by the frequency space (readout band width divided by minimum channel spacing): for a 2 GHz band with 20 MHz spacing (Q_c = 300): 100 channels maximum. Practical limit is set by maintaining >99% readout fidelity across all channels, which degrades with crosstalk at high density. Near-term target: 32-64 qubits per line with TWPA-based readout and optimized frequency planning.
Does multiplexing add crosstalk?
Yes, but manageable. Crosstalk sources: (1) Direct frequency overlap of resonator tails (Lorentzian response tails extend beyond the 3 dB bandwidth). For 200 MHz spacing and kappa/2pi = 3 MHz: tail overlap at the adjacent channel = (kappa/2)^2 / ((200)^2 + (kappa/2)^2) ≈ -40 dB. Negligible. (2) Readout-induced qubit transitions: the readout tone for qubit A can drive transitions on qubit B if f_readout_A is near f_qubit_B - chi_B. This is avoided by frequency planning. (3) Room-temperature signal generation: DAC intermodulation products from multi-tone generation can create spurious tones at unwanted frequencies. Mitigated by using high-linearity DACs and moderate output power.
How does multiplexing affect readout speed?
Multiplexing does not fundamentally change the readout speed per qubit. All N qubits are read out simultaneously (same probe tones applied at the same time, same integration window). The total readout time is the same as for a single qubit: 200-500 ns. However: (1) The total readout power increases by N (sum of all tone powers), which must stay below the amplifier P1dB. (2) The FPGA processing latency increases with N (more parallel demodulations), adding 10-100 ns to the total feedback latency. (3) The data throughput increases by N, requiring higher-bandwidth data links between the FPGA and the classical computer.