How do I select the loop filter components for a charge pump PLL synthesizer?
PLL Loop Filter Design
The loop filter is the most critical analog component in a PLL synthesizer. Its design directly determines the synthesizer's phase noise, spurious performance, and settling speed.
| Parameter | Passive Diode | Active FET | Subharmonic |
|---|---|---|---|
| Conversion Loss/Gain | 5-9 dB loss | 0-10 dB gain | 8-12 dB loss |
| LO Drive Level | +7 to +17 dBm | -5 to +5 dBm | +5 to +13 dBm |
| IP3 (typical) | +15 to +30 dBm | +5 to +20 dBm | +10 to +20 dBm |
| Noise Figure | 5-9 dB (= conv. loss) | 8-15 dB | 9-14 dB |
| LO-RF Isolation | 25-45 dB | 15-35 dB | 20-40 dB |
- Performance verification: confirm specifications against the application requirements before finalizing the design
- Environmental factors: temperature range, humidity, and vibration affect long-term reliability and parameter drift
- Cost vs. performance: evaluate whether the application demands premium components or standard commercial grades
- Interface compatibility: verify impedance, connector type, and mechanical form factor match the system architecture
Frequently Asked Questions
Should I use an active or passive loop filter?
Passive loop filter (the standard): simple, no added noise, no power supply needed. The tuning voltage range is limited to the charge pump supply voltage (typically 0-5V). Use when the VCO's tuning range fits within the charge pump's voltage range. Active loop filter (op-amp integrator): provides higher tuning voltage than the charge pump supply (using an op-amp with a higher supply voltage). Adds op-amp noise (degrades close-in phase noise). Used when the VCO requires a wider tuning voltage range or when the PLL needs a specific transfer function that cannot be realized with passive components.
How do I verify the loop filter design?
Simulation: use the synthesizer IC manufacturer's design tool (Analog Devices ADIsimPLL, Texas Instruments WEBENCH PLLatinum) to simulate the PLL's closed-loop response, phase noise, and settling time. These tools calculate the loop filter components and predict performance. Measurement: after building the circuit: measure the open-loop gain and phase margin using the VCO tuning voltage injection method (inject a small sinusoidal signal at the VCO tuning input and measure the response at the charge pump output). Verify: the measured loop bandwidth and phase margin match the design target, the reference spurs are at the expected level, and the settling time (measured by switching the frequency and monitoring the tuning voltage) meets the requirement.
What about integrated PLL filters?
Some modern PLL ICs (e.g., Analog Devices ADF4356, Texas Instruments LMX2594) include on-chip loop filter options or digital loop filters that eliminate external components. Digital loop filters provide: precise bandwidth control (programmable), no component drift with temperature, and the ability to implement complex filter transfer functions. However: on-chip filters are limited to narrow loop bandwidths (due to the digital filter's update rate) and may add quantization noise. For the lowest phase noise: external passive loop filters are still preferred.