Why add a bottom ground plane to a CPW?

Standard CPW has no bottom ground, which allows electromagnetic fields to leak through the bottom of the board and radiate into the metallic chassis or interfere with other boards stacked below it. In high-density electronics (like cell phones), structural shielding is mandatory. Adding a bottom ground plane traps the fields entirely within the PCB, providing mechanical isolation and preventing cross-talk with nearby electronics.

Is CPWG just a Microstrip with poured ground on top?

Visually yes, but electromagnetically no. It depends entirely on the gap width. If the gap between the top trace and the top grounds is very wide, the electric fields will ignore the top grounds and plunge straight down to the bottom ground plane; it acts purely as a Microstrip. If the gap is very narrow, the fields will shoot sideways to the top grounds; it acts purely as a CPW. A true CPWG is a mathematical hybrid where the fields split between the top gaps and the bottom plane.

Why are via fences mandatory in CPWG?

Because you now have two massive sheets of copper (top ground and bottom ground) separated by a dielectric. This forms a giant parallel-plate capacitor. RF energy can easily leak into this space and excite 'Parallel-Plate Waveguide Modes,' which bounce around inside the board, resonating and destroying the signal. To prevent this, designers must drill rows of vias ('via stitching' or 'via fences') along the edges of the top ground planes, electrically shorting the top and bottom planes together and physically blocking the parasitic waves.

Simulation & Design

Grounded Coplanar Waveguide (CPWG)

A PCB designer needs to route a 5 GHz Wi-Fi signal. They want the zero-via surface mounting capability of a Coplanar Waveguide (CPW), but the board will be bolted directly to a metal heat sink. A pure CPW lacks a bottom ground plane, meaning the signal's fields would leak into the heat sink and short out. The designer opts for a Grounded Coplanar Waveguide (CPWG). They route the signal trace and two adjacent ground planes on the top layer, but also pour a solid ground plane on the bottom layer. To stop the RF energy from getting trapped and resonating between the top and bottom planes, they drill a dense "picket fence" of vias along the entire length of the trace. The result is the ultimate hybrid: it allows surface-mount chips to ground directly to the top layer without inductive vias, while the bottom ground plane provides absolute structural shielding from the metal chassis below.

Category: Simulation & Design

Architecture: Top CPW + Bottom Ground + Via Fence

Primary Advantage: Surface grounding combined with bottom shielding

The Impedance Tug-of-War

Geometry Factor	Field Behavior	Dominant Impedance Mode
Gap (G) is much smaller than Height (h)	Fields shoot sideways to the top grounds	Acts mostly like standard CPW
Gap (G) is much larger than Height (h)	Fields shoot straight down to the bottom ground	Acts mostly like Microstrip
Gap (G) ≈ Height (h)	Fields split between side and bottom	True Hybrid CPWG

Via Spacing Rule for CPWG:
To prevent the "picket fence" from leaking RF energy or allowing the top and bottom ground planes to resonate, the physical distance between the stitching vias (s) must be significantly smaller than the wavelength of the highest operating frequency.
s ≤ λ_g / 20
Where λ_g is the guided wavelength in the substrate. If the vias are spaced too far apart, the high-frequency wave will simply slip between them, exciting parasitic substrate modes and destroying the signal integrity.

Via Edge Distance Rule:
The vias should not be placed flush against the edge of the gap. They must be set back slightly into the top ground plane to prevent their physical plating cylinders from distorting the smooth electromagnetic field lines flowing across the gap.

Common Questions

Frequently Asked Questions

Does adding the bottom ground change the impedance?

Yes. If you design a perfect 50-ohm standard CPW, and then simply pour a ground plane on the bottom layer without recalculating, the impedance will drop (often to 35-40 ohms). The bottom ground plane adds extra parasitic capacitance to the center trace. To get back to 50 ohms, you must either make the center trace narrower or make the surface gaps wider.

Why is CPWG preferred for RF test boards?

When engineering teams evaluate a new RF chip, they mount it on an evaluation board with SMA connectors. End-launch SMA connectors naturally have a center pin and surrounding ground prongs that perfectly mate to a CPWG profile. Furthermore, the bottom ground plane allows the board to be bolted firmly to heavy aluminum test fixtures without altering the RF fields.

Can I use CPWG for high-power amplifiers?

Yes, and it is highly recommended. High-power RF transistors generate massive amounts of heat. The bottom ground plane of a CPWG provides an excellent thermal conduit. Designers can place the transistor on the top layer and drop "thermal vias" directly beneath it, conducting heat straight through the board to the bottom plane and into an external heat sink, all without compromising the RF routing.

Related Terms

← Coplanar Waveguide Corrugated Horn →

PCB Design

CPWG Synthesis Tool

Input your substrate thickness, dielectric constant, and desired frequency. Balance the trace width against the gap width to achieve exactly 50 ohms while calculating the mandatory via-stitching pitch required to suppress parallel-plate modes.

Calculate CPWG Geometry