EMC/EMI

Converter EMI

Q: Why does the EMI spectrum of a switching converter roll off in two distinct slopes?

The switch-node voltage is a trapezoidal wave, and the envelope of its Fourier series has two corner frequencies. Below f1 = 1/(pi x t_on), set by the on-time, the harmonic envelope is flat. Between f1 and f2 = 1/(pi x t_r), set by the edge rise time, the envelope falls at 20 dB/decade. Above f2 it falls at 40 dB/decade. This means the rise and fall times, not the switching frequency, dominate the high-frequency emissions that matter most for radiated EMI. A converter switching at 500 kHz with a 5 ns edge has its second corner near 64 MHz, so spectral content extends well into the VHF band. Slowing the edges or adding a snubber lowers f2 and reduces high-frequency content, at the cost of higher switching loss.

Q: What is the difference between common-mode and differential-mode converter noise, and how are they filtered?

Differential-mode (DM) noise flows in a loop along the supply and return conductors and is driven mainly by the converter input ripple current; it dominates the lower part of the conducted band, roughly 150 kHz to a few MHz. Common-mode (CM) noise flows in the same direction on both conductors and returns through earth or chassis via parasitic capacitance, typically from the switch-node copper to the heatsink; it dominates from a few MHz to 30 MHz. DM noise is suppressed with X-capacitors and a small differential inductor, while CM noise requires a common-mode choke (a single core carrying both lines so DM flux cancels) plus Y-capacitors to chassis. Separating the two with a noise separator before filter design is the standard practice because each path needs a different network.

Q: How much input EMI filter attenuation do I need to pass CISPR 32 Class B?

First measure or simulate the unfiltered conducted emission at the worst frequency, then subtract the CISPR 32 Class B limit (66 dBuV quasi-peak at 150 kHz falling to 56 dBuV from 0.5 to 5 MHz, then 60 dBuV to 30 MHz) and add a 6 dB design margin. A two-stage LC or CLC filter provides 40 x N dB/decade, so a single LC stage (N = 1) gives 40 dB/decade and a two-stage filter gives 80 dB/decade. If you need 50 dB of attenuation at 150 kHz from a filter resonance placed at 15 kHz, a single LC stage delivers roughly 40 dB and a two-stage CLC is usually required. Always check that the filter corner stays well below the switching frequency and that the filter output impedance does not interact with the converter input impedance, which can cause instability per the Middlebrook criterion.

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Switching power converters are a dominant source of broadband electromagnetic interference in modern electronics. Every time the power switch turns on or off, the switch-node voltage swings through hundreds of volts in a few nanoseconds, and the loop current changes by several amps just as fast. Those steep dv/dt and di/dt edges, together with parasitic ringing between the switch capacitance and layout inductance, generate energy at the switching frequency and dozens of its harmonics, extending from the 150 kHz conducted band up to several hundred MHz. The noise splits into a differential-mode component that flows in the supply loop and a common-mode component that returns through parasitic capacitance to chassis, and each path is attenuated by a dedicated EMI filter network so the converter can pass CISPR 32 or MIL-STD-461 limits.

Category: EMC/EMI

Conducted band: 150 kHz to 30 MHz

Radiated band: 30 MHz to 1 GHz

Where Switching Converter Noise Comes From

The fundamental cause of converter EMI is the deliberate, repetitive switching that makes a buck, boost, or flyback regulator efficient. The power MOSFET or diode forces the switch node to swing rail-to-rail with edge rates of 1 to 10 V/ns in silicon designs and 30 to 100 V/ns in fast GaN devices. The current in the high-frequency commutation loop steps just as sharply, and because that loop has finite inductance, the result is a damped ringing waveform riding on every edge. The ringing frequency is set by the parasitic switch-node capacitance and the loop inductance, and it typically lands between 50 and 300 MHz, which is precisely where radiated emissions are measured. Minimizing the physical area of that commutation loop is the single most effective layout technique for reducing high-frequency converter EMI.

Two coupling mechanisms carry the noise off the board. Conducted emissions flow back out through the input and output cables and are measured with a line impedance stabilization network (LISN) from 150 kHz to 30 MHz. Radiated emissions are launched from cables and the switch-node copper acting as inefficient antennas, and are measured in a chamber from 30 MHz to 1 GHz or higher. Below a few MHz the dominant culprit is differential-mode ripple current drawn from the source; above a few MHz, common-mode current injected through the switch-node-to-heatsink capacitance takes over. Effective suppression therefore requires both a tight layout and a filter that treats the two modes independently.

The Trapezoidal Spectrum and Edge Rate

The switch-node waveform is well modeled as a trapezoid, and the envelope of its harmonic amplitudes has two break points. The first corner is set by the pulse width and the second by the edge rise time. Because the second corner depends on rise time, slowing the edges with a gate resistor or an RC snubber directly lowers the high-frequency content, trading EMI for switching loss. The equations below quantify both the harmonic envelope and the input filter attenuation needed to meet a given limit.

Switching harmonics:
f_n = n × f_sw  (n = 1, 2, 3, …)

Trapezoidal envelope corners:
f₁ = 1 / (π × t_on)  (0 to −20 dB/dec)
f₂ = 1 / (π × t_r)  (−20 to −40 dB/dec)

Switch-node ringing:
f_ring = 1 / (2π × √(L_loop × C_oss))

Input EMI filter attenuation:
A ≈ 40 × N dB/decade  (N = LC stages)

Where f_sw = switching frequency, t_on = on-time, t_r = edge rise time, L_loop = commutation-loop inductance, C_oss = switch output capacitance. Example: f_sw = 500 kHz, t_r = 5 ns → f₂ ≈ 64 MHz.

EMI by Converter Topology

Topology	Typical f_sw	Dominant CE source	Dominant RE source	Filter approach
Buck	100 kHz to 2 MHz	Input ripple (DM)	Switch-node ringing	LC π-filter + CM choke
Boost	100 kHz to 1 MHz	Both input and output	Diode reverse recovery	CLC π-filter
Flyback	50 kHz to 500 kHz	Primary ripple (DM)	Transformer CM coupling	CM choke + Y-caps
LLC resonant	50 kHz to 500 kHz	Lower (soft-switched)	Low dv/dt edges	Smaller single-stage
GaN high-frequency	1 to 10 MHz	High-frequency CM	Broadband 100+ MHz	Shield + 2-stage filter

Common Questions

Frequently Asked Questions

Why does the EMI spectrum of a switching converter roll off in two distinct slopes?

The switch-node trapezoid has two envelope corners: f₁ = 1/(π×t_on), below which the envelope is flat, and f₂ = 1/(π×t_r), set by the edge rise time. Between them the amplitude falls 20 dB/decade; above f₂ it falls 40 dB/decade. Because f₂ depends on rise time, the edges dominate high-frequency content. A 500 kHz converter with a 5 ns edge has f₂ near 64 MHz, putting energy into the VHF band; slowing edges or adding a snubber lowers f₂ at the cost of switching loss.

What is the difference between common-mode and differential-mode converter noise, and how are they filtered?

Differential-mode noise flows in the supply-and-return loop, driven by input ripple, and dominates roughly 150 kHz to a few MHz; it is suppressed with X-capacitors and a small DM inductor. Common-mode noise flows the same direction on both lines, returning through switch-node-to-chassis capacitance, and dominates from a few MHz to 30 MHz; it needs a common-mode choke plus Y-capacitors to chassis. Separating the two modes with a noise separator before designing the filter is standard practice, since each path requires a different network.

How much input EMI filter attenuation do I need to pass CISPR 32 Class B?

Measure the unfiltered conducted emission at the worst frequency, subtract the CISPR 32 Class B limit (66 dBµV QP at 150 kHz, 56 dBµV from 0.5 to 5 MHz, 60 dBµV to 30 MHz), and add 6 dB margin. A filter gives 40 × N dB/decade, so one LC stage delivers about 40 dB and a two-stage CLC about 80 dB per decade. Keep the filter corner well below f_sw, and verify the filter output impedance does not interact with the converter input impedance (Middlebrook criterion), which can cause instability.

Related Terms

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