Continuously Variable Attenuator
How Analog Attenuation Control Works
The defining feature of a continuously variable attenuator is its monotonic, glitch-free transfer function: a single control input maps smoothly to attenuation. In a PIN diode realization, a forward bias current of 0.1 to 20 mA modulates the diode's intrinsic-region resistance from several kilohms down to a few ohms, and a resistive bridge (PI, T, or bridged-tee network) converts that variable resistance into controlled loss while two or three arms vary together to hold the input and output match. FET attenuators operate the device as a voltage-controlled resistor in the linear (triode) region, where the gate voltage sets the drain-source channel resistance with no DC current draw. Mechanical types rotate a resistive vane or sliding lossy card into the field of a waveguide or coaxial line, giving extremely high power handling and excellent linearity at the cost of slow, manual adjustment.
Two performance axes dominate the design trade space. The first is the match versus attenuation: a simple reflective two-diode design varies its input and output return loss dramatically as it attenuates, while absorptive PI and T networks hold a near-constant 50 ohm match by varying two or three resistive arms together. The second is insertion phase, the phase shift through the device as a function of setting. Single-element designs can swing 5 to 30 degrees across their range, which corrupts amplitude and phase tracking in phased arrays and I/Q channels, so constant-phase (phase-invariant) topologies use distributed quad-diode or balanced structures to hold delta-phase under 5 degrees.
Because the control input is analog, these attenuators integrate naturally with the error amplifier of an AGC loop or a detector-driven leveling circuit. The loop senses output power, compares it to a reference, and drives the attenuator's bias to hold the level flat as input power, temperature, or frequency drift. The price of that smoothness is calibration: the dB-versus-control curve is nonlinear and temperature dependent, so high-accuracy systems either linearize it with a lookup table or, where repeatability matters more than smoothness, fall back to a digital step attenuator.
Governing Relationships
A(dB) = −20 × log10|S21|
PI-network arm resistances (symmetric, Z0 source/load):
Rseries = Z0 × (K2 − 1) / (2K) where K = 10A/20
Rshunt = Z0 × (K + 1) / (K − 1)
PIN diode RF resistance vs. bias current:
Rs ≈ W2 / (2 × μ × τ × Ibias)
Where A = attenuation in dB, Z0 = 50 Ω reference, W = intrinsic-region width, μ = carrier mobility, τ = carrier lifetime, Ibias = forward current. Example: A = 10 dB → K ≈ 3.16, Rseries ≈ 71 Ω, Rshunt ≈ 96 Ω.
Technology Comparison
| Technology | Control | Dynamic Range | Settling | Output IP3 | Best Use |
|---|---|---|---|---|---|
| PIN diode (absorptive) | Bias current | 20 to 40 dB | 10 to 500 ns | +30 to +45 dBm | AGC, leveling loops |
| Cold-FET / MMIC | Gate voltage | 15 to 35 dB | 1 to 50 ns | +20 to +35 dBm | Fast analog control, no DC draw |
| Voltage-variable resistor | Voltage | 10 to 30 dB | < 100 ns | +25 to +35 dBm | Compact integrated gain trim |
| Mechanical vane | Rotary / linear | 0 to 60 dB | Manual (seconds) | > +60 dBm | High-power, lab standards |
| Digital step (reference) | Digital bus | 0 to 31.5 dB | 10 to 200 ns | +45 to +55 dBm | Calibrated, repeatable settings |
Frequently Asked Questions
What is the difference between a continuously variable attenuator and a digital step attenuator?
A continuously variable attenuator sets loss over a smooth analog range from a voltage, current, or mechanical drive, giving effectively infinite resolution with no quantization steps or switching glitches, which is why it is preferred inside AGC and leveling loops. A digital step attenuator (DSA) switches fixed states in 0.25, 0.5, or 1 dB increments over a 6- or 7-bit range via a digital bus, winning where repeatable, hysteresis-free, calibrated settings matter. PIN and FET analog types settle in nanoseconds; DSA settling adds bus latency to the switch transition.
How much insertion phase shift does a PIN diode variable attenuator add across its range?
A simple series or shunt PIN attenuator shifts insertion phase 5 to 30 degrees from minimum to maximum attenuation as the junction capacitance and resistance change with bias. Balanced or distributed quad-PIN topologies that hold a constant match keep delta-phase under 5 degrees across a 20 to 30 dB range. Reflective two-diode designs track phase worst; absorptive bridged-tee and PI/T networks are far better. Specify a constant-phase part and verify delta-phase versus attenuation on a vector network analyzer.
What limits the linearity and IP3 of a continuously variable attenuator?
In PIN designs, stored charge and carrier lifetime in the intrinsic region set linearity; below about 100 MHz the RF current can modulate the diode resistance within a cycle, so low-frequency parts need long-lifetime diodes (1 to 5 μs) and adequate bias current, reaching output IP3 of +30 to +45 dBm. Cold-FET attenuators are limited by channel-resistance nonlinearity, giving +20 to +35 dBm but faster settling and zero DC current. Raising PIN bias current improves IP3 at the cost of higher power consumption.