Conductive Substrate
How Substrate Conductivity Steals RF Energy
A substrate is called conductive when its bulk resistivity is low enough that the material no longer behaves as a clean RF dielectric. The deciding parameter is the dielectric relaxation frequency, the point at which conduction current and displacement current in the material become comparable. Below that frequency the substrate acts resistively and dissipates power; above it the substrate begins to behave capacitively like an insulator. For standard bulk silicon at 1 to 20 Ω·cm the relaxation frequency falls right inside the cellular and lower microwave bands, which is precisely why low-resistivity silicon is such a poor RF carrier for passive structures.
Two distinct loss mechanisms dominate. The first is electric-field coupling: fringing fields from signal traces terminate on the conductive bulk, driving conduction current through the lossy material and appearing as a shunt conductance per unit length. The second is magnetic coupling, where time-varying flux from inductors and current loops induces eddy currents in the substrate; those eddy currents both dissipate power and produce a counter-field that lowers the realized inductance. Together they cap the achievable quality factor of on-chip passives and add real loss on top of the conductor loss tied to metal skin depth.
The practical fix is to keep the RF field out of the lossy bulk. Designers raise substrate resistivity (high-resistivity silicon, SOI handle wafers, semi-insulating GaAs), interpose a patterned ground plane or shield, thicken the dielectric stack above the substrate, or move sensitive passives to the top redistribution metal. Each approach trades cost and process complexity for higher Q and better isolation.
The Three Propagation Regimes (Slow-Wave Effect)
A metal-insulator-semiconductor microstrip on a conductive substrate is the textbook model for this behavior. As frequency or substrate conductivity changes, the line moves through a dielectric quasi-TEM regime, a slow-wave regime where the effective permittivity can swell to 50 or more and phase velocity collapses, and finally a skin-effect regime at high conductivity. The slow-wave regime is exploited deliberately in some phase shifters but is a parasitic nuisance in most digital and RF interconnect.
Loss and Slow-Wave Equations
fσ = σ / (2πε0εr) = 1 / (2πρε0εr)
Substrate shunt loss (per unit length):
Gsub ≈ ωCsub × tanδeff, with tanδeff ≈ σ / (ωε0εr)
Skin depth into the conductive bulk:
δs = √( 2ρ / (ωμ) ) = √( ρ / (πfμ0) )
Effective permittivity in slow-wave regime:
εeff = (c / vp)2 (rises far above static εr as f → fσ)
Where σ = bulk conductivity, ρ = 1/σ = resistivity, εr = relative permittivity (≈11.7 for Si, ≈12.9 for GaAs), μ0 = permeability, vp = phase velocity. Example: ρ = 10 Ω·cm Si → fσ ≈ 15 GHz, so loss is severe through most of the microwave band.
Substrate Resistivity and RF Behavior
| Substrate | Bulk resistivity | εr | RF classification | Typical inductor Q | Common use |
|---|---|---|---|---|---|
| Bulk CMOS silicon | 1 to 20 Ω·cm | 11.7 | Conductive (lossy) | 5 to 12 | Digital, low-cost SoC |
| High-resistivity Si | 1 to 10 kΩ·cm | 11.7 | Quasi-dielectric | 20 to 35 | RF SOI, mmWave |
| RF SOI (trap-rich) | > 3 kΩ·cm handle | 11.7 | Low-loss | 25 to 40 | Antenna switches, tuners |
| Semi-insulating GaAs | ≈107 Ω·cm | 12.9 | Insulating | 30 to 50 | PA, LNA, MMIC |
| Semi-insulating InP | ≈108 Ω·cm | 12.5 | Insulating | 30 to 55 | >100 GHz front ends |
| Sapphire / quartz | >1011 Ω·cm | 9.4 / 3.8 | Insulating | 40 to 60 | High-Q passives, SoS |
Frequently Asked Questions
How much does a low-resistivity silicon substrate degrade inductor Q?
On standard CMOS silicon at 1 to 20 Ω·cm, a spiral inductor peaks at Q of 5 to 12 near 2 to 5 GHz because field coupling and induced eddy currents dissipate energy in the conductive bulk. High-resistivity silicon (1 to 10 kΩ·cm) or semi-insulating GaAs (≈107 Ω·cm) lets the same geometry reach Q of 25 to 40. Patterned ground shields and thick top-metal layers push more field away from the lossy substrate.
What resistivity is considered semi-insulating versus conductive for RF substrates?
The boundary is gradual, but as a rule of thumb a substrate below roughly 100 Ω·cm is conductive and adds significant RF loss, while above about 1 kΩ·cm it behaves as a good RF dielectric. Semi-insulating GaAs and InP sit near 107 and 108 Ω·cm and are treated as nearly lossless. Bulk CMOS silicon (1 to 20 Ω·cm) is firmly conductive, which drove the development of RF SOI and high-resistivity handle wafers.
What is the slow-wave mode and when does it occur in conductive substrates?
A metal-insulator-semiconductor line passes through three regimes. At low frequency it is a dielectric quasi-TEM line; in the slow-wave regime the electric field terminates on the semiconductor surface while the magnetic field penetrates the bulk, so effective permittivity climbs to 50 or more and phase velocity drops; at higher frequency or conductivity it enters the skin-effect regime. The transitions scale with the relaxation frequency f = σ/(2πε).
How do you reduce substrate coupling between RF blocks on a conductive die?
Use guard rings tied to a clean ground, deep trench isolation, physical separation of noisy and sensitive blocks, differential signaling, and low-inductance substrate-contact rings. RF SOI with a buried oxide and high-resistivity handle cuts substrate-coupled crosstalk by 20 to 40 dB versus bulk silicon. In modules, a grounded backside metal and through-substrate vias hold the carrier at a defined potential and shorten the return path.