Conducted EMI (Power)
How Switching Converters Generate Line Noise
A switch-mode converter is an efficient power processor precisely because it chops the input with hard, fast transitions instead of dissipating energy linearly. Each transition is a small step of voltage and current with rise and fall times in the tens of nanoseconds, which by Fourier decomposition contains harmonic energy reaching well past 30 MHz. Two distinct paths carry this energy back onto the supply lines. The differential-mode path follows the same loop as the load current and is driven by the trapezoidal ripple drawn through the input capacitor and its equivalent series resistance and inductance. The common-mode path is more subtle: the high dv/dt at the switch node couples through parasitic capacitance, the heatsink, and transformer interwinding capacitance into the safety ground, returning to the source through the green-wire and chassis.
Because the two mechanisms have different source impedances and different frequency signatures, they must be measured and filtered independently. Differential-mode noise tends to dominate from 150 kHz up to a couple of megahertz, where it is set by ripple amplitude and capacitor parasitics. Common-mode noise tends to dominate from a few megahertz to 30 MHz, where it is set by node slew rate and stray capacitance. A LISN presents a defined 50 ohm impedance to the equipment under test at RF while still passing mains power, so that the noise voltage developed across that impedance is repeatable from lab to lab. The receiver then applies CISPR 16 quasi-peak and average detectors, which weight the measurement by pulse repetition rate so that infrequent spikes are penalized less than continuous tones.
Suppression is a filtering problem. The classic off-line input filter places a common-mode choke in series with the lines, a pair of Y-capacitors from each line to ground to shunt common-mode current, and X-capacitors across the lines plus the choke leakage inductance to attenuate differential-mode current. Good layout, gate-drive slew control, shielding the switch node, and adding a Faraday shield in the transformer all reduce the noise at the source so the filter has less to do.
Common-Mode and Differential-Mode Governing Relations
VCM = (VL1 + VL2) / 2 VDM = (VL1 − VL2) / 2
dBµV conversion (across 50 Ω LISN):
Level (dBµV) = 20 × log10( Vnoise / 1 µV )
Common-mode noise current from switch-node dv/dt:
iCM ≈ Cpar × (dv/dt)
CM choke corner frequency:
fc = 1 / (2π × √(2 × LCM × CY))
Where VL1, VL2 = the two LISN line voltages, Cpar = parasitic switch-to-ground capacitance, LCM = choke common-mode inductance, CY = line-to-ground capacitance. Example: Cpar = 50 pF with dv/dt = 20 V/ns gives iCM ≈ 1 A peak of common-mode drive.
Conducted Emission Limits and Filter Elements
| Standard / Element | Frequency Range | Quasi-Peak Limit | Average Limit | Targets | Notes |
|---|---|---|---|---|---|
| CISPR 32 / FCC Class B | 0.15 to 0.5 MHz | 66 to 56 dBµV | 56 to 46 dBµV | CM + DM | Residential, sliding limit |
| CISPR 32 / FCC Class B | 0.5 to 5 MHz | 56 dBµV | 46 dBµV | CM + DM | Flat region |
| CISPR 32 / FCC Class B | 5 to 30 MHz | 60 dBµV | 50 dBµV | Mostly CM | Slew-rate driven |
| Class A (industrial) | 0.15 to 30 MHz | 79 to 73 dBµV | 66 to 60 dBµV | CM + DM | ~13 dB looser than B |
| Common-mode choke | 0.5 to 30 MHz | n/a | n/a | CM current | 1 to 30 mH, high μ ferrite |
| Y-capacitor | 0.15 to 30 MHz | n/a | n/a | CM shunt | 1 to 4.7 nF, leakage limited |
| X-capacitor + leakage L | 0.15 to 2 MHz | n/a | n/a | DM current | 0.1 to 2.2 µF across line |
Frequently Asked Questions
My converter passes below 2 MHz but fails from 10 to 20 MHz, which noise mode should I chase?
That spectral signature points to common-mode noise. Differential-mode dominates the low end, roughly 150 kHz to 2 MHz, where it is set by input ripple and capacitor ESR/ESL. Common-mode dominates the upper band, roughly 2 to 30 MHz, because it is driven by switch-node dv/dt coupling through parasitic and transformer interwinding capacitance to safety ground. A failure concentrated from 10 to 20 MHz almost always means CM, so attack it with a larger common-mode choke, better Y-capacitor placement, a transformer Faraday shield, and slower gate slew rather than touching the X-capacitor and differential elements.
Why do CISPR and FCC stop the conducted measurement at 30 MHz and start it at 150 kHz?
Below 150 kHz the spectrum is governed by mains harmonics, handled by separate IEC 61000-3-2 current limits. Above 30 MHz the dominant coupling shifts from conduction along cabling to radiation, covered by radiated-emission limits. Switching fundamentals of 50 kHz to a few hundred kHz drop their harmonics directly into this band, and fast edges spread energy to tens of megahertz, so 150 kHz to 30 MHz is the critical compliance window for power converters.
If I move to a GaN design and raise the switching frequency, will my conducted EMI improve or get worse?
Pushing the fundamental higher shifts the harmonic comb upward; if it moves above 150 kHz the first harmonics can leave the low end of the band, easing differential-mode limits and shrinking the magnetics. But faster edges, especially with GaN and SiC devices having very high dv/dt, raise high-frequency content and excite parasitic resonances, worsening common-mode emissions in the 5 to 30 MHz region. The net result depends on slew rates, layout parasitics, and whether spread-spectrum or soft-switching is used, and GaN often trades smaller magnetics for a harder CM and radiated fight above 10 MHz.
What does the LISN actually present to my power supply during a conducted scan?
The equipment under test is powered through a 50 ohm/50 µH line impedance stabilization network that presents a defined RF impedance to each line while still passing mains power. Each line-to-ground port feeds a CISPR 16 receiver applying quasi-peak and average detectors across 150 kHz to 30 MHz. The quasi-peak detector weights the reading by pulse repetition rate, and both the QP and average results must sit under the applicable Class A or Class B limit lines with adequate margin.