Measurements, Testing, and Calibration Additional Practical Test Questions Informational

How do I measure the settling time of a frequency synthesizer after a frequency hop?

Q: What equipment is best?

For fast synthesizer settling time measurement: real-time spectrum analyzer (Keysight UXA or MXA with RTSA option, R&S FSW with RTSA, Tektronix RSA5000): directly displays the frequency vs. time during the hop. Most intuitive and informative. Cost: $30,000-100,000. Oscilloscope + FM discriminator: a high-bandwidth oscilloscope (2+ GHz) with a wideband FM discriminator (commercial or built from a mixer + delay line). Cost: $10,000-50,000+ (mainly the scope). For simple measurements: a spectrum analyzer in zero-span mode (max hold at the target frequency) can approximate the settling time, but lacks the time resolution of the methods above.

Q: How do I reduce settling time?

Design techniques for faster settling: increase the PLL loop bandwidth (faster settling but: more reference spur leakage and higher phase noise). Use a fractional-N PLL (wider loop bandwidth is possible because the reference frequency can be higher). Use frequency pre-steering (the VCO tuning voltage is pre-set to the expected value for the target frequency using a DAC; the PLL only corrects the residual error, settling much faster). Use a DDS (near-instantaneous frequency changes, but: limited in frequency range and spurious performance). Use a PLL + DDS hybrid (the DDS handles fine frequency steps within the PLL bandwidth; the PLL handles coarse steps).

Q: What about spectral purity during the hop?

During the frequency transition: the synthesizer output sweeps through intermediate frequencies, generating wideband spectral content. This transient spectrum: can interfere with other channels (in a crowded spectrum environment), reduces the effective signal-to-noise ratio during the transition, and may violate spectral mask requirements. In military FHSS systems: the transient spectrum is called 'splatter' and must be minimized. Techniques: fast settling (shorter transient duration means less total splatter energy), output blanking (an RF switch turns off the output during the hop transient, eliminating splatter but creating a gap in the signal), and shaped hopping (controlling the VCO tuning voltage trajectory to minimize the transient spectral width).

Measuring the settling time of a frequency synthesizer after a frequency hop determines the time required for the synthesizer's output frequency to reach the new target frequency within a specified accuracy (typically ±1 ppm or ±100 Hz) after a frequency change command is issued. This is critical for frequency-hopping communication systems (military radios, Bluetooth), agile radar (which rapidly changes carrier frequency between pulses), and test equipment (fast signal generators). Measurement methods: the FM discriminator method (the synthesizer output is fed to a wideband FM discriminator (a mixer with a delay line, or a dedicated FM demodulator); the discriminator output voltage is proportional to the instantaneous frequency deviation from the carrier; a fast oscilloscope captures the discriminator output during the frequency hop, showing: the initial frequency step, the PLL transient (ringing, overshoot), and the final settling to the target frequency; settling time is measured as the time from the hop command to when the frequency error stays within the specified tolerance), the spectrum analyzer spectrogram method (a real-time spectrum analyzer (RTSA: R&S FSW, Keysight UXA, Tektronix RSA) captures the time-frequency behavior during the hop using a spectrogram (waterfall) display; the RTSA captures the frequency vs. time trace, showing: the hop trajectory, any transient frequency excursions, and the settling time; advantage: direct visualization of the frequency vs. time behavior), and the mixing/IF method (mix the synthesizer output with a reference signal at the target frequency; the mixer output at IF shows: a transient as the PLL locks (the IF sweeps and rings), and the settled condition (a stable IF signal); the oscilloscope measures the time to reach a stable IF frequency).

Category: Measurements, Testing, and Calibration

Updated: April 2026

Product Tie-In: VNAs, Signal Generators, Power Meters

Synthesizer Settling Time Measurement

Settling time is one of the most important specifications for agile frequency synthesizers because it determines: the maximum hop rate (hops per second = 1/settling_time), the system throughput (time spent settling is time not spent communicating or sensing), and the vulnerability window (in military FHSS: the signal is detectable and jammable during the settling transient).

Typical Settling Times

Integer-N PLL: 50-500 μs (limited by the loop bandwidth, which must be < reference_freq/10)
Fractional-N PLL: 10-100 μs (wider loop bandwidth possible)
DDS (Direct Digital Synthesis): < 1 μs (essentially instantaneous, limited only by the DAC settling)
PLL + DDS hybrid: 1-10 μs (DDS for fine steps, PLL for coarse steps)

Settling Time Parameters

Settling time: t_settle = time to reach ±Δf_tolerance of target
PLL settling: t_settle ≈ -ln(Δf_tolerance/Δf_step)/(ζ×ω_n)
Where ζ = damping factor, ω_n = natural frequency
For ζ=0.707, ω_n=2π×10kHz: t_settle ≈ 50 μs (to ±1 ppm)
DDS settling: t_settle ≈ 1/f_clock (pipeline delay)

Common Questions

Frequently Asked Questions

What equipment is best?

For fast synthesizer settling time measurement: real-time spectrum analyzer (Keysight UXA or MXA with RTSA option, R&S FSW with RTSA, Tektronix RSA5000): directly displays the frequency vs. time during the hop. Most intuitive and informative. Cost: $30,000-100,000. Oscilloscope + FM discriminator: a high-bandwidth oscilloscope (2+ GHz) with a wideband FM discriminator (commercial or built from a mixer + delay line). Cost: $10,000-50,000+ (mainly the scope). For simple measurements: a spectrum analyzer in zero-span mode (max hold at the target frequency) can approximate the settling time, but lacks the time resolution of the methods above.

How do I reduce settling time?

Design techniques for faster settling: increase the PLL loop bandwidth (faster settling but: more reference spur leakage and higher phase noise). Use a fractional-N PLL (wider loop bandwidth is possible because the reference frequency can be higher). Use frequency pre-steering (the VCO tuning voltage is pre-set to the expected value for the target frequency using a DAC; the PLL only corrects the residual error, settling much faster). Use a DDS (near-instantaneous frequency changes, but: limited in frequency range and spurious performance). Use a PLL + DDS hybrid (the DDS handles fine frequency steps within the PLL bandwidth; the PLL handles coarse steps).

What about spectral purity during the hop?

During the frequency transition: the synthesizer output sweeps through intermediate frequencies, generating wideband spectral content. This transient spectrum: can interfere with other channels (in a crowded spectrum environment), reduces the effective signal-to-noise ratio during the transition, and may violate spectral mask requirements. In military FHSS systems: the transient spectrum is called 'splatter' and must be minimized. Techniques: fast settling (shorter transient duration means less total splatter energy), output blanking (an RF switch turns off the output during the hop transient, eliminating splatter but creating a gap in the signal), and shaped hopping (controlling the VCO tuning voltage trajectory to minimize the transient spectral width).

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